STMicroelectronics Discovery kit for STM32L151/152 line - with STM32L152RC MCU STM32L152C-DISCO STM32L152C-DISCO Hoja De Datos

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STM32L15xCC STM32L15xRC STM32L15xUC STM32L15xVC
Functional overview
51
1. Legend:
AF: alternate function
ADC: analog-to-digital converter
BOR: brown out reset
DMA: direct memory access
DAC: digital-to-analog converter
I²C: inter-integrated circuit multimaster interface
3.1 
Low power modes
The ultra-low-power STM32L15xxC supports dynamic voltage scaling to optimize its power 
consumption in run mode. The voltage from the internal low-drop regulator that supplies the 
logic can be adjusted according to the system’s maximum operating frequency and the 
external voltage supply. 
There are three power consumption ranges: 
Range 1 (V
DD
 range limited to 1.71 V-3.6 V), with the CPU running at up to 32  MHz
Range 2 (full V
DD
 range), with a maximum CPU frequency of 16 MHz
Range 3 (full V
DD
 range), with a maximum CPU frequency limited to 4 MHz (generated 
only with the multispeed internal RC oscillator clock source)
Seven low power modes are provided to achieve the best compromise between low power 
consumption, short startup time and available wakeup sources:
Sleep
 mode
In Sleep mode, only the CPU is stopped. All peripherals continue to operate and can 
wake up the CPU when an interrupt/event occurs. Sleep mode power consumption at 
16 MHz is about 1 mA with all peripherals off.
Low power run
 mode
This mode is achieved with the multispeed internal (MSI) RC oscillator set to the 
minimum clock (131 kHz), execution from SRAM or Flash memory, and internal 
regulator in low power mode to minimize the regulator's operating current. In Low 
power run mode, the clock frequency and the number of enabled peripherals are both 
limited.
Low power sleep
 mode
This mode is achieved by entering Sleep mode with the internal voltage regulator in 
Low power mode to minimize the regulator’s operating current. In Low power sleep 
mode, both the clock frequency and the number of enabled peripherals are limited; a 
typical example would be to have a timer running at 32 kHz.
When wakeup is triggered by an event or an interrupt, the system reverts to the run 
mode with the regulator on.
Stop
 mode with RTC
Stop mode achieves the lowest power consumption while retaining the RAM and 
register contents and real time clock. All clocks in the V
CORE
 domain are stopped, the 
PLL, MSI RC, HSI RC and HSE crystal oscillators are disabled. The LSE or LSI is still 
running. The voltage regulator is in the low power mode.
The device can be woken up from Stop mode by any of the EXTI line, in 8 µs. The EXTI 
line source can be one of the 16 external lines. It can be the PVD output, the 
Comparator 1 event or Comparator 2 event (if internal reference voltage is on), it can 
be the RTC alarm(s), the USB wakeup, the RTC tamper events, the RTC timestamp 
event or the RTC wakeup.