Intel 815 Manuel D’Utilisation
Intel® 815 Chipset: Graphics Controller PRM, Rev 1.0
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9.6.12. CR0A
Text Cursor Start Register
I/O (and Memory Offset) Address: 3B5h/3D5h (index=0Ah)
Default:
Default:
00UU UUUUb (U=Undefined)
Attributes: Read/Write
This cursor is the text cursor that is part of the VGA standard, and should not be confused with the
hardware cursor and popup (a.k.a., cursor and cursor 2), which are intended to be used in graphics
modes. This text cursor exists only in text modes, and thus, this register is entirely ignored in graphics
modes.
hardware cursor and popup (a.k.a., cursor and cursor 2), which are intended to be used in graphics
modes. This text cursor exists only in text modes, and thus, this register is entirely ignored in graphics
modes.
7 6
5
4
0
Reserved (00)
Text
Cursor Off
Text Cursor Start
Bit Description
7:6
Reserved. Read as 0s.
5
Text Cursor Off.
0 = Enables the text cursor.
1 = Disables the text cursor.
0 = Enables the text cursor.
1 = Disables the text cursor.
4:0
Text Cursor Start. This field specifies which horizontal line of pixels in a character box is to be used to
display the first horizontal line of the cursor in text mode. The horizontal lines of pixels in a character box
are numbered from top to bottom, with the top-most line being number 0. The value specified by these 5
bits should be the number of the first horizontal line of pixels on which the cursor is to be shown.
display the first horizontal line of the cursor in text mode. The horizontal lines of pixels in a character box
are numbered from top to bottom, with the top-most line being number 0. The value specified by these 5
bits should be the number of the first horizontal line of pixels on which the cursor is to be shown.
9.6.13. CR0B
Text Cursor End Register
I/O (and Memory Offset) Address: 3B5h/3D5h (index=0Bh)
Default:
Default:
0UUU UUUUb (U=Undefined)
Attributes: Read/Write
This cursor is the text cursor that is part of the VGA standard, and should not be confused with the
hardware cursor and popup (a.k.a., cursor and cursor 2), which are intended to be used in graphics
modes. This text cursor exists only in text modes, and so this register is entirely ignored in graphics modes.
hardware cursor and popup (a.k.a., cursor and cursor 2), which are intended to be used in graphics
modes. This text cursor exists only in text modes, and so this register is entirely ignored in graphics modes.
7
6
5
4
0
Reserved
Text Cursor Skew
Text Cursor End
Bit Description
7
Reserved. Read as 0s.
6:5
Text Cursor Skew. This field specifies the degree to which the start and end of each horizontal line of
pixels making up the cursor is delayed to compensate for internal pipeline delays. These 2 bits describe
the delay in terms of a number character clocks.
00 = No delay
01 = Delayed by 1 character clock
10 = Delayed by 2 character clocks
11 = Delayed by 3 character clocks
pixels making up the cursor is delayed to compensate for internal pipeline delays. These 2 bits describe
the delay in terms of a number character clocks.
00 = No delay
01 = Delayed by 1 character clock
10 = Delayed by 2 character clocks
11 = Delayed by 3 character clocks
4:0
Text Cursor End. This field specifies which horizontal line of pixels in a character box is to be used to
display the last horizontal line of the cursor in text mode. The horizontal lines of pixels in a character box
are numbered from top to bottom, with the top-most line being number 0. The value specified by these 5
bits should be the number of the last horizontal line of pixels on which the cursor is to be shown.
display the last horizontal line of the cursor in text mode. The horizontal lines of pixels in a character box
are numbered from top to bottom, with the top-most line being number 0. The value specified by these 5
bits should be the number of the last horizontal line of pixels on which the cursor is to be shown.