Intel 815 Manuel D’Utilisation

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Intel® 815 Chipset: Graphics Controller PRM, Rev 1.0 
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15 
1. Introduction 
The Intel
â
 815 chipset is a highly flexible chipset designed to extend from the basic graphics/multimedia 
PC platform up to the mainstream performance desktop platform. The chipset consists of an Intel
®
 82815 
chipset Graphics and Memory Controller Hub (GMCH), an I/O Controller Hub (ICH) for the I/O 
subsystem, and a Firmware* Hub (FWH). For this chipset, the graphics capability resides in the Graphics 
and Memory Controller Hub (GMCH) chip. 
The GMCH’s Graphics Controller (GC) contains an extensive set of registers and instructions for 
configuration, 2D, 3D, and Video systems. This document describes the Intel
®
 815 chipset 
registers/instructions and provides detailed bit/field descriptions.  
This Programmer’s Reference Manual (PRM) is intended for hardware, software, and Firmware* 
designers who seek to implement or utilize the graphic functions of the Intel
â 
815 chipset. Familiarity 
with 2D and 3D graphics programming is assumed. 
1.1. Terminology 
 
Term Description 
AGP Mode 
The GMCH is using its capability to interface with and AGP card. The internal 
graphics controller is disabled in this mode. 
GPA Card 
Graphics Performance Accelerator Card. This is a new implementation which 
allows local memory devices to be placed on a card that plugs into the AGP slot. 
When an AGP card is not present, an GPA card can be added to improve 
performance by acting as a display cache, for the Z-buffer only, of up to 4 MB. 
The GPA card was previously known as the AIMM (Add-In Memory Module). 
CSI 
Command Stream Interface (same as instruction stream interface) 
GC Graphics 
Controller 
GFX Mode 
The GMCH is using its internal graphics capability. This means that the ability to 
interface with an AGP card is disabled. 
GMCH 
The Graphics and Memory Controller Hub component that contains the 
functionality of an MCH plus an internal graphics controller. 
Group 0 Protection (register) 
As per the original IBM VGA specification, CRT Controller registers CR[0:7] can 
be write-protected via CR11[bit 7]. In BIOS code, this write protection is set 
following each mode change. Note that other group protection levels have no 
current use and are not supported by the GC. Only Group 0 Protection is 
supported. 
Instruction 
The GC has a set of graphics instructions. In some documents the term 
“command” is used for instruction.  
IP Instruction 
Parser 
MBZ 
Must Be Zero