Intel 815 Manuel D’Utilisation

Page de 423
 
 
Intel® 815 Chipset: Graphics Controller PRM, Rev 1.0 
R
 
 
 
  
213 
13.3.1.  Motion Vector Format 
The motion vectors provided in the GFXBLOCK instruction have the following format.  
 
DWord Bits 
Description 
0 31:16 
Horizontal Motion Vector Value: The value is signed 2’s complement fixed point 
with the following formats, depending on the Motion Vector Precision bits. The 
range defines the clamp boundaries for the values. 
 Precision  Format 
Range 
 
 
1
/
2
 pixel 
S14.1 
[-1024.0–1023.5] 
 
1
/
4
 pixel 
S13.2 
[-1024.0–1023.75] 
 
1
/
8
 pixel 
S12.3 
[-1024.0–1023.875] 
 15:0 
Vertical Motion Vector Value: The value is signed 2’s complement fixed point with 
the following formats, depending on the Motion Vector Precision bits. The range 
defines the clamp boundaries for the values. 
 Precision  Format 
Range  
 
1
/
2
 pixel 
S14.1 
[-1024.0–1023.5] 
 
1
/
4
 pixel 
S13.2 
[-1024.0–1023.75] 
 
1
/
8
 pixel 
S12.3 
[-1024.0–1023.875] 
13.4. 
Non-pipelined State Variables 
The GMCH does not optimize on state variables that change infrequently. ISVs are asked to group 
polygons for state changes for performance reasons. In the GMCH, the following state variables will not 
be pipelined: 
Z_BIAS[7:0], FOG_CLR[23:0], ALPHA_REF[7:0], ALPHA_FUNC[2:0], KILL_PIXEL, 
COLOR_KEYH[15:0], COLOR_KEYL[15:0], COLOR_INDEX[7:0], DEST_BUFFER_VARIABLES, 
DRAWING_RECTANGLE_INFO, SCISSOR_RECTANGLE_INFO. 
These have been grouped appropriately into packets that tell the instruction parser that these are non-
pipelined state variables. The 3D pipeline will be flushed up to and including the Color Calculator stage 
before these state variables are updated. The pixel cache or the streamers do not need to be flushed for 
state change. It is important for the application to group these changes into one pipeline to minimize 
performance impact. This optimization has no software impact other than a slight performance impact.