Intel 815 Manuel D’Utilisation
Intel® 815 Chipset: Graphics Controller PRM, Rev 1.0
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15.4.3. Overlay Initial Phase Registers
Provides a spatial sub-pixel accurate adjustment. This value is always a fractional positive number that
when combined with the subtract one from initial phase bit, the possible range for initial phase becomes -
1<phase<1. There are two separate vertical initial phase registers that are used in field based image
processing.
when combined with the subtract one from initial phase bit, the possible range for initial phase becomes -
1<phase<1. There are two separate vertical initial phase registers that are used in field based image
processing.
15.4.3.1.
YRGB_VPH—Y/RGB Vertical Phase Register
Memory Address Offset:
1Ch (R/W)
On-chip Reg. Mem Addr Offset:
3011Ch (RO; debug path)
Default Value:
00h
Access:
see address offset above
Size:
32 bits
31
20 19
16 15
4 3
0
Y/RGB Vertical Phase
Buffer/Field 1
Reserved Y/RGB
Vertical
Phase
Buffer/Field 0
Reserved
Bit Description
31:20
Y/RGB Vertical Phase Buffer/Field 1. This fractional value sets the initial vertical phase.
In packed formats:
YUV/RGB data buffer 1 when up scaling in frame mode
YUV/RGB data field 1 when up scaling in field mode
YUV/RGB data field 1 when up scaling in field mode
In planar YUV formats:
Y data buffer 1 when up scaling in frame mode
Y data field 1 when up scaling in field mode
Y data field 1 when up scaling in field mode
19:16
Reserved.
15:4
Y/RGB Vertical Phase Buffer/Field 0. This fractional value sets the initial vertical phase.
In packed formats:
YUV/RGB data buffer 0 when up scaling in frame mode
YUV/RGB data field 0 when up scaling in field mode.
YUV/RGB data field 0 when up scaling in field mode.
In planar YUV modes:
Y data buffer 0 when up scaling in frame mode
Y data field 0 when up scaling in field mode.
Y data field 0 when up scaling in field mode.
3:0
Reserved.