Intel 815 Manuel D’Utilisation
Intel® 815 Chipset: Graphics Controller PRM, Rev 1.0
R
98
9.3.11. GR10
Address Mapping
I/O (and Memory Offset) Address: 3CFh (Index=10h)
Default: 00h
Attributes: R/W
Default: 00h
Attributes: R/W
7
5
4 3 2 1 0
Reserved Paging
to
LM
VGA
Buffer /
Memory
Map
Packed
Mode
Enable
Linear
Mapping
Page
Mapping
Bit Description
7:5
Reserved.
4
Page to Local Memory Enable.
Used Only if GR10(0) = 1 {Paging enabled} and (GR10(1) = 1 or GR10(2) = 1) {Either packed mode or
Linear mode is enabled) and GR10(3) = 0 {VGA Buffer selected}
Linear mode is enabled) and GR10(3) = 0 {VGA Buffer selected}
0 = Page to VGA Buffer.
1 = Page to Physical Local Memory.
3
VGA Buffer/Memory Map Select.
0 = VGA Buffer (default)
1 = Memory Map.
2
Packed Mode Enable.
0 = Address and data translation are bused register settings (default)
1 = Forced extended pack pixel address translation. In page mapping mode, register GR06 selects the
video memory address.
1
Linear Mapping (PCI).
0 = Disable (default)
1 = Enable
0
Page Mapping Enable. This mode allows the mapping of the VGA space allocated in main memory
(non local video memory) mode or all of local memory space through the [A0000:AFFFF] window
(Using bit 4 of this register), which is a 64KB page. An internal address is generated using GR11[6:0]
as the address line [22:16] extension to A[15:2].
(non local video memory) mode or all of local memory space through the [A0000:AFFFF] window
(Using bit 4 of this register), which is a 64KB page. An internal address is generated using GR11[6:0]
as the address line [22:16] extension to A[15:2].
0 = Disable (default)
1 = Enable