Intel 253666-024US Manuel D’Utilisation
3-290 Vol. 2A
FADD/FADDP/FIADD—Add
INSTRUCTION SET REFERENCE, A-M
FADD/FADDP/FIADD—Add
Description
Adds the destination and source operands and stores the sum in the destination loca-
tion. The destination operand is always an FPU register; the source operand can be a
register or a memory location. Source operands in memory can be in single-precision
or double-precision floating-point format or in word or doubleword integer format.
The no-operand version of the instruction adds the contents of the ST(0) register to
the ST(1) register. The one-operand version adds the contents of a memory location
(either a floating-point or an integer value) to the contents of the ST(0) register. The
two-operand version, adds the contents of the ST(0) register to the ST(i) register or
vice versa. The value in ST(0) can be doubled by coding:
tion. The destination operand is always an FPU register; the source operand can be a
register or a memory location. Source operands in memory can be in single-precision
or double-precision floating-point format or in word or doubleword integer format.
The no-operand version of the instruction adds the contents of the ST(0) register to
the ST(1) register. The one-operand version adds the contents of a memory location
(either a floating-point or an integer value) to the contents of the ST(0) register. The
two-operand version, adds the contents of the ST(0) register to the ST(i) register or
vice versa. The value in ST(0) can be doubled by coding:
FADD ST(0), ST(0);
The FADDP instructions perform the additional operation of popping the FPU register
stack after storing the result. To pop the register stack, the processor marks the
ST(0) register as empty and increments the stack pointer (TOP) by 1. (The no-
operand version of the floating-point add instructions always results in the register
stack being popped. In some assemblers, the mnemonic for this instruction is FADD
rather than FADDP.)
The FIADD instructions convert an integer source operand to double extended-preci-
sion floating-point format before performing the addition.
stack after storing the result. To pop the register stack, the processor marks the
ST(0) register as empty and increments the stack pointer (TOP) by 1. (The no-
operand version of the floating-point add instructions always results in the register
stack being popped. In some assemblers, the mnemonic for this instruction is FADD
rather than FADDP.)
The FIADD instructions convert an integer source operand to double extended-preci-
sion floating-point format before performing the addition.
Opcode
Instruction
64-Bit
Mode
Compat/
Leg Mode
Description
D8 /0
FADD m32fp
Valid
Valid
Add m32fp to ST(0) and store result
in ST(0).
DC /0
FADD m64fp
Valid
Valid
Add m64fp to ST(0) and store result
in ST(0).
D8 C0+i
FADD ST(0), ST(i)
Valid
Valid
Add ST(0) to ST(i) and store result in
ST(0).
DC C0+i
FADD ST(i), ST(0)
Valid
Valid
Add ST(i) to ST(0) and store result in
ST(i).
DE C0+i
FADDP ST(i), ST(0)
Valid
Valid
Add ST(0) to ST(i), store result in
ST(i), and pop the register stack.
DE C1
FADDP
Valid
Valid
Add ST(0) to ST(1), store result in
ST(1), and pop the register stack.
DA /0
FIADD m32int
Valid
Valid
Add m32int to ST(0) and store
result in ST(0).
DE /0
FIADD m16int
Valid
Valid
Add m16int to ST(0) and store
result in ST(0).