Intel 253666-024US Manuel D’Utilisation
Vol. 2A 3-555
INSTRUCTION SET REFERENCE, A-M
LOOP/LOOPcc—Loop According to ECX Counter
LOOP/LOOPcc—Loop According to ECX Counter
Description
Performs a loop operation using the RCX, ECX or CX register as a counter (depending
on whether address size is 64 bits, 32 bits, or 16 bits). Note that the LOOP instruction
ignores REX.W; but 64-bit address size can be over-ridden using a 67H prefix.
Each time the LOOP instruction is executed, the count register is decremented, then
checked for 0. If the count is 0, the loop is terminated and program execution
continues with the instruction following the LOOP instruction. If the count is not zero,
a near jump is performed to the destination (target) operand, which is presumably
the instruction at the beginning of the loop.
The target instruction is specified with a relative offset (a signed offset relative to the
current value of the instruction pointer in the IP/EIP/RIP register). This offset is
generally specified as a label in assembly code, but at the machine code level, it is
encoded as a signed, 8-bit immediate value, which is added to the instruction pointer.
Offsets of –128 to +127 are allowed with this instruction.
Some forms of the loop instruction (LOOPcc) also accept the ZF flag as a condition for
terminating the loop before the count reaches zero. With these forms of the instruc-
tion, a condition code (cc) is associated with each instruction to indicate the condition
being tested for. Here, the LOOPcc instruction itself does not affect the state of the ZF
flag; the ZF flag is changed by other instructions in the loop.
on whether address size is 64 bits, 32 bits, or 16 bits). Note that the LOOP instruction
ignores REX.W; but 64-bit address size can be over-ridden using a 67H prefix.
Each time the LOOP instruction is executed, the count register is decremented, then
checked for 0. If the count is 0, the loop is terminated and program execution
continues with the instruction following the LOOP instruction. If the count is not zero,
a near jump is performed to the destination (target) operand, which is presumably
the instruction at the beginning of the loop.
The target instruction is specified with a relative offset (a signed offset relative to the
current value of the instruction pointer in the IP/EIP/RIP register). This offset is
generally specified as a label in assembly code, but at the machine code level, it is
encoded as a signed, 8-bit immediate value, which is added to the instruction pointer.
Offsets of –128 to +127 are allowed with this instruction.
Some forms of the loop instruction (LOOPcc) also accept the ZF flag as a condition for
terminating the loop before the count reaches zero. With these forms of the instruc-
tion, a condition code (cc) is associated with each instruction to indicate the condition
being tested for. Here, the LOOPcc instruction itself does not affect the state of the ZF
flag; the ZF flag is changed by other instructions in the loop.
Operation
IF (AddressSize
=
32)
THEN Count is ECX;
ELSE IF (AddressSize = 64)
Count is RCX;
ELSE Count is CX;
FI;
FI;
Count ← Count – 1;
IF Instruction is not LOOP
THEN
Opcode
Instruction 64-Bit
Mode
Compat/
Leg Mode
Description
E2 cb
LOOP rel8
Valid
Valid
Decrement count; jump short if count ≠ 0.
E1 cb
LOOPE rel8
Valid
Valid
Decrement count; jump short if count ≠ 0
and ZF = 1.
E0 cb
LOOPNE rel8 Valid
Valid
Decrement count; jump short if count ≠ 0
and ZF = 0.