Intel 253666-024US Manuel D’Utilisation

Page de 760
Vol. 2A 3-635
INSTRUCTION SET REFERENCE, A-M
MOVHPS—Move High Packed Single-Precision Floating-Point Values
MOVHPS—Move High Packed Single-Precision Floating-Point Values
Description
Moves two packed single-precision floating-point values from the source operand 
(second operand) to the destination operand (first operand). The source and destina-
tion operands can be an XMM register or a 64-bit memory location. This instruction 
allows two single-precision floating-point values to be moved to and from the high 
quadword of an XMM register and memory. It cannot be used for register to register 
or memory to memory moves. When the destination operand is an XMM register, the 
low quadword of the register remains unchanged.
In 64-bit mode, use of the REX.R prefix permits this instruction to access additional 
registers (XMM8-XMM15).
Operation
MOVHPS instruction for memory to XMM move:
DEST[127:64] ← SRC;
(* DEST[63:0] unchanged *)
MOVHPS instruction for XMM to memory move:
DEST ← SRC[127:64];
Intel C/C++ Compiler Intrinsic Equivalent
MOVHPS __m128d _mm_loadh_pi ( __m128d a, __m64 *p)
MOVHPS void _mm_storeh_pi (__m64 *p, __m128d a) 
SIMD Floating-Point Exceptions
None.
Protected Mode Exceptions
#GP(0)
For an illegal memory operand effective address in the CS, DS, 
ES, FS or GS segments.
Opcode
Instruction
64-Bit 
Mode
Compat/
Leg Mode
Description
0F 16 /r
MOVHPS xmm
m64
Valid
Valid
Move two packed single-precision 
floating-point values from m64 to 
high quadword of xmm.
0F 17 /r
MOVHPS m64
xmm
Valid
Valid
Move two packed single-precision 
floating-point values from high 
quadword of xmm to m64.