Intel 253666-024US Manuel D’Utilisation

3-642 Vol. 2A

MOVLPS—Move Low Packed Single-Precision Floating-Point Values

INSTRUCTION SET REFERENCE, A-M

MOVLPS—Move Low Packed Single-Precision Floating-Point Values

Description

Moves two packed single-precision floating-point values from the source operand 
(second operand) and the destination operand (first operand). The source and desti-
nation operands can be an XMM register or a 64-bit memory location. This instruction 
allows two single-precision floating-point values to be moved to and from the low 
quadword of an XMM register and memory. It cannot be used for register to register 
or memory to memory moves. When the destination operand is an XMM register, the 
high quadword of the register remains unchanged.
In 64-bit mode, use of the REX.R prefix permits this instruction to access additional 
registers (XMM8-XMM15).

Operation

MOVLPD instruction for memory to XMM move:

DEST[63:0] ← SRC;

(* DEST[127:64] unchanged *)

MOVLPD instruction for XMM to memory move:

DEST ← SRC[63:0];

Intel C/C++ Compiler Intrinsic Equivalent

MOVLPS

__m128 _mm_loadl_pi ( __m128 a, __m64 *p)

MOVLPS

void _mm_storel_pi (__m64 *p, __m128 a) 

SIMD Floating-Point Exceptions

None.

Protected Mode Exceptions

#GP(0)

For an illegal memory operand effective address in the CS, DS, 

ES, FS or GS segments.

Opcode

Instruction

64-Bit 

Mode

Compat/

Leg Mode

Description

0F 12 /r

MOVLPS xmm, 

Valid

Valid

Move two packed single-precision 

floating-point values from m64 to low 

quadword of xmm.

0F 13 /r

MOVLPS m64, 

Valid

Valid

Move two packed single-precision 

floating-point values from low 

quadword of xmm to m64.