Intel 253666-024US Manuel D’Utilisation
Vol. 2A 3-679
INSTRUCTION SET REFERENCE, A-M
MOVSLDUP—Move Packed Single-FP Low and Duplicate
MOVSLDUP—Move Packed Single-FP Low and Duplicate
Description
The linear address corresponds to the address of the least-significant byte of the
referenced memory data. When a memory address is indicated, the 16 bytes of data
at memory location m128 are loaded and the single-precision elements in positions 0
and 2 are duplicated. When the register-register form of this operation is used, the
same operation is performed but with data coming from the 128-bit source register.
See Figure 3-16.
referenced memory data. When a memory address is indicated, the 16 bytes of data
at memory location m128 are loaded and the single-precision elements in positions 0
and 2 are duplicated. When the register-register form of this operation is used, the
same operation is performed but with data coming from the 128-bit source register.
See Figure 3-16.
In 64-bit mode, use of the REX.R prefix permits this instruction to access additional
registers (XMM8-XMM15).
registers (XMM8-XMM15).
Opcode
Instruction
64-Bit
Mode
Compat/
Leg Mode
Description
F3 0F 12 /r MOVSLDUP xmm1,
xmm2/m128
Valid
Valid
Move two single-precision floating-point
values from the lower 32-bit operand of
each qword in xmm2/m128 to xmm1
and duplicate each 32-bit operand to
the higher 32-bits of each qword.
Figure 3-16. MOVSLDUP—Move Packed Single-FP Low and Duplicate
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