Intel 253666-024US Manuel D’Utilisation
3-690 Vol. 2A
MOVUPS—Move Unaligned Packed Single-Precision Floating-Point Values
INSTRUCTION SET REFERENCE, A-M
MOVUPS—Move Unaligned Packed Single-Precision Floating-Point
Values
Description
Moves a double quadword containing four packed single-precision floating-point
values from the source operand (second operand) to the destination operand (first
operand). This instruction can be used to load an XMM register from a 128-bit
memory location, store the contents of an XMM register into a 128-bit memory loca-
tion, or move data between two XMM registers. When the source or destination
operand is a memory operand, the operand may be unaligned on a 16-byte boundary
without causing a general-protection exception (#GP) to be generated.
To move packed single-precision floating-point values to and from memory locations
that are known to be aligned on 16-byte boundaries, use the MOVAPS instruction.
While executing in 16-bit addressing mode, a linear address for a 128-bit data access
that overlaps the end of a 16-bit segment is not allowed and is defined as reserved
behavior. A specific processor implementation may or may not generate a general-
protection exception (#GP) in this situation, and the address that spans the end of
the segment may or may not wrap around to the beginning of the segment.
In 64-bit mode, use of the REX.R prefix permits this instruction to access additional
registers (XMM8-XMM15).
values from the source operand (second operand) to the destination operand (first
operand). This instruction can be used to load an XMM register from a 128-bit
memory location, store the contents of an XMM register into a 128-bit memory loca-
tion, or move data between two XMM registers. When the source or destination
operand is a memory operand, the operand may be unaligned on a 16-byte boundary
without causing a general-protection exception (#GP) to be generated.
To move packed single-precision floating-point values to and from memory locations
that are known to be aligned on 16-byte boundaries, use the MOVAPS instruction.
While executing in 16-bit addressing mode, a linear address for a 128-bit data access
that overlaps the end of a 16-bit segment is not allowed and is defined as reserved
behavior. A specific processor implementation may or may not generate a general-
protection exception (#GP) in this situation, and the address that spans the end of
the segment may or may not wrap around to the beginning of the segment.
In 64-bit mode, use of the REX.R prefix permits this instruction to access additional
registers (XMM8-XMM15).
Operation
DEST ← SRC;
Intel C/C++ Compiler Intrinsic Equivalent
MOVUPS __m128 _mm_loadu_ps(double * p)
MOVUPS void _mm_storeu_ps(double *p, __m128 a)
MOVUPS void _mm_storeu_ps(double *p, __m128 a)
SIMD Floating-Point Exceptions
None.
Opcode
Instruction
64-Bit
Mode
Compat/
Leg Mode
Description
0F 10 /r
MOVUPS xmm1,
xmm2/m128
Valid
Valid
Move packed single-precision floating-
point values from xmm2/m128 to
xmm1.
0F 11 /r
MOVUPS xmm2/m128,
xmm1
Valid
Valid
Move packed single-precision floating-
point values from xmm1 to
xmm2/m128.