Intel i7-3920XM Extreme AW8063801009607 Manuel D’Utilisation
Codes de produits
AW8063801009607
Processor Configuration Registers
222
Datasheet, Volume 2
2.12.7
DMIVC0RSTS—DMI VC0 Resource Status Register
This register reports the Virtual Channel specific status.
2.12.8
DMIVC1RCAP—DMI VC1 Resource Capability Register
B/D/F/Type:
0/0/0/DMIBAR
Address Offset:
1A–1Bh
Reset Value:
0002h
Access:
RO-V
Size:
16 bits
BIOS Optimal Default
0000h
Bit
Access
Reset
Value
RST/
PWR
Description
15:2
RO
0h
Reserved (RSVD)
1
RO-V
1b
Uncore
Virtual Channel 0 Negotiation Pending (VC0NP)
0 = The VC negotiation is complete.
1 = The VC resource is still in the process of negotiation
0 = The VC negotiation is complete.
1 = The VC resource is still in the process of negotiation
(initialization or disabling).
This bit indicates the status of the process of Flow Control
initialization. It is set by default on Reset, as well as whenever
the corresponding Virtual Channel is Disabled or the Link is in the
DL_Down state.
It is cleared when the link successfully exits the FC_INIT2 state.
BIOS Requirement: Before using a Virtual Channel, software
It is cleared when the link successfully exits the FC_INIT2 state.
BIOS Requirement: Before using a Virtual Channel, software
must check whether the VC Negotiation Pending fields for that
Virtual Channel are cleared in both Components on a Link.
0
RO
0h
Reserved (RSVD)
B/D/F/Type:
0/0/0/DMIBAR
Address Offset:
1C–1Fh
Reset Value:
00008001h
Access:
RO
Size:
32 bits
BIOS Optimal Default
00h
Bit
Access
Reset
Value
RST/
PWR
Description
31:24
RO
00h
Uncore
Reserved for Port Arbitration Table Offset (PATO)
23
RO
0h
Reserved (RSVD)
22:16
RO
00h
Uncore
Reserved for Maximum Time Slots (MTS)
15
RO
1b
Uncore
Reject Snoop Transactions (REJSNPT)
0 = Transactions with or without the No Snoop bit set within the
0 = Transactions with or without the No Snoop bit set within the
TLP header are allowed on this VC.
1 = When set, any transaction for which the No Snoop attribute
is applicable but is not set within the TLP Header will be
rejected as an Unsupported Request.
14:8
RO
0h
Reserved (RSVD)
7:0
RO
01h
Uncore
Port Arbitration Capability (PAC)
Having only bit 0 set indicates that the only supported arbitration
Having only bit 0 set indicates that the only supported arbitration
scheme for this VC is non-configurable hardware-fixed.