Intel E3815 FH8065301567411 Fiche De Données
Codes de produits
FH8065301567411
Intel
®
Atom™ Processor E3800 Product Family
Datasheet
745
14.11.85 AUD_HDMIW_HDMIEDID_B—Offset 62150h
HDMI Data EDID Block Pipe B
Access Method
Default: 00000000h
31
28
24
20
16
12
8
4
0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
RE
SE
RVED
CTS
_
M_V
A
LUE
_
IND
E
X
ENABLE_CT
S
_OR_M_PROGRAMMING
CT
S_PROGRAMMING
Bit
Range
Default &
Access
Field Name (ID): Description
31:22
0b
RW
RESERVED:
Project: All Format:
21
0b
RW
CTS_M_VALUE_INDEX:
Project: All
Default Value: 0b
Value Name Description Project
0b CTS CTS value read on bits 23:4 reflects CTS value. Bit 23:4 is programmable to any
CTS value. default is 0 All
1b M M value read on bits 21:4 reflects DP M value. Set this bit to 1 before programming
M value register. When this is set to 1 23:4 will reflect the current N value All
20
0b
RW
ENABLE_CTS_OR_M_PROGRAMMING:
Project: All
See Pipe A description.
19:0
0b
RW
CTS_PROGRAMMING:
Project: All
See Pipe A description.
Type:
Memory Mapped I/O Register
(Size: 32 bits)
Offset:
GTTMMADR_LSB Type:
PCI Configuration Register (Size: 32
bits)
GTTMMADR_LSB Reference:
GTTMMADR_LSB Reference:
[B:0, D:2, F:0] + 10h