Manuels d'utilisation pour Intel 31244 PCI-X

Table des matières

• Contents

  3
  • Figures

    5
    • Figure 1. Intel® 31244 PCI-X to Serial ATA Controller Block Diagram

      14
    • Figure 2. Quad Serial ATA Host Bus Adapter

      15
    • Figure 3. Packaging Considerations

      17
    • Figure 4. Package Information: 256-pin PBGA

      22
    • Figure 5. PBGA Mapped By Pin Function

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    • Figure 6. Examples of Stubless and Short Stub Traces

      25
    • Figure 7. Crosstalk Effects on Trace Distance and Height

      26
    • Figure 8. PCB Ground Layout Around Connectors

      26
    • Figure 9. Cross Section of Differential Trace

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    • Figure 10. LED and Serial EEPROM Configurations

      34
    • Figure 11. Intel® 31244 PCI-X to Serial ATA Controller Connection Scheme - Normal Mode

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    • Figure 12. Intel® 31244 PCI-X to Serial ATA Controller HBA Stackup

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    • Figure 13. Write Backplane Topology

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    • Figure 14. Read Backplane Topology

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    • Figure 15. Microstrip Stackup

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    • Figure 16. Stripline Stackup

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    • Figure 17. Single-Slot Topology

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    • Figure 18. Embedded Intel® 31244 PCI-X to Serial ATA Controller Design with Single PCI-X Load

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    • Figure 19. Embedded PCI-X Design With Multiple Loads

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    • Figure 20. Serial ATA Direct Connect

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    • Figure 21. Serial ATA Connectors Cable to Host Connections

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    • Figure 22. Serial ATA Host Connectors

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    • Figure 23. Serial ATA Cable Signal Connections

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    • Figure 24. Serial ATA Eye Diagram

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    • Figure 25. Extended Mode Receiver Example

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    • Figure 26. Extended Mode Driver Example

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    • Figure 27. Intel® IQ31244 PCI-X to Serial ATA Controller Evaluation Platform Board Block Diagram

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  • Tables

    6
    • Table 1. Reference Documents

      9
    • Table 2. Terminology and Definition (Sheet 1 of 3)

      9
    • Table 3. Serial ATA Signals Pin Descriptions

      18
    • Table 4. PCI-X Bus Pin Descriptions (Sheet 1 of 2)

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    • Table 5. Configuration Pin Descriptions

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    • Table 6. JTAG Pin Descriptions

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    • Table 7. Serial ROM Interface Pin Descriptions

      21
    • Table 8. Power Supply Pin Descriptions

      21
    • Table 9. Normal Voltage Mode

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    • Table 10. Extended Voltage Mode

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    • Table 11. Normal Voltage Mode

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    • Table 12. Motherboard Stackup, Microstrip

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    • Table 13. Motherboard Microstrip Parameters

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    • Table 14. Backplane Stripline Stackup

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    • Table 15. Backplane Stackup, Microstrip

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    • Table 16. Backplane Stackup, Offset Stripline

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    • Table 17. Cable Specification

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    • Table 18. PCI/X Voltage Levels

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    • Table 19. PCI-X Clocking Modes

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    • Table 20. Add-on Card Routing Parameters

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    • Table 21. PCI-X Slot Guidelines

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    • Table 22. Wiring Lengths for Single Slot

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    • Table 23. Wiring Lengths for Embedded Intel® 31244 PCI-X to Serial ATA Controller with Single PCI-X Load

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    • Table 24. Wire Lengths For Multiple PCI-X Load Embedded Intel® 31244 PCI-X to Serial ATA Controller Design

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    • Table 25. Serial ATA Signal Definitions

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    • Table 26. Interface Timing and SI Requirements

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    • Table 27. Timing Requirement

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    • Table 28. Extended Voltage Mode Receiver

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    • Table 29. Extended Mode Driver

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    • Table 30. Terminations: Pull-up/Pull-down (Sheet 1 of 2)

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    • Table 31. Logic Analyzer Pod 1 (Sheet 1 of 2)

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    • Table 32. Logic Analyzer Pod 2

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    • Table 33. Logic Analyzer Pod 3

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    • Table 34. Logic Analyzer Pod 4

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    • Table 35. Logic Analyzer Pod 5

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    • Table 36. Logic Analyzer Pod 6

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    • Table 37. Thermal Resistance

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    • Table 38. 544-Lead H-PBGA Package Thermal Characteristics

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    • Table 39. Design References

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    • Table 40. Intel Related Documentation

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    • Table 41. Electronic Information

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  • Revision History

    7
• About This Document 1

  9
  • 1.1 Reference Documentation

    9
  • 1.2 Terminology and Definitions

    9
• Overview 2

  13
  • 2.1 Features

    13
  • 2.2 Applications

    15
• Intel® 31244 PCI-X to Serial ATA Controller Package 3

  17
  • 3.1 Signal Pin Descriptions

    18
    • 3.1.1 VA0, VA1 (VCCPLL) Pin Requirements

      21
  • 3.2 Package/Marking Information

    22
  • 3.3 Ball Map By Function

    23
• Routing Guidelines 4

  25
  • 4.1 General Routing Guidelines

    25
  • 4.2 Crosstalk

    26
  • 4.3 EMI Considerations

    27
  • 4.4 Power Distribution and Decoupling

    28
    • 4.4.1 Decoupling

      28
      • 4.4.1.1 Intel® 31244 PCI-X to Serial ATA Controller Decoupling

        28
  • 4.5 Trace Impedance

    29
    • 4.5.1 Differential Impedance

      29
• Intel® 31244 PCI-X to Serial ATA Controller Interface Ports 5

  31
  • 5.1 Serial ROM Interface

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  • 5.2 JTAG Interface

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  • 5.3 PCI-X Interface

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  • 5.4 Serial ATA Interface

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    • 5.4.1 Direct Port Access (DPA)

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    • 5.4.2 Extended Voltage Mode

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    • 5.4.3 LED Interface

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    • 5.4.4 Reference Clock Generation

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• Printed Circuit Board (PCB) Methodology 6

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  • 6.1 Intel® 31244 PCI-X to Serial ATA Controller Normal Mode (standard SATA driver)

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    • 6.1.1 Intel® 31244 PCI-X to Serial ATA Controller HBA Stackup

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  • 6.2 Extended Voltage Mode

    39
    • 6.2.1 Backplane Topologies

      40
    • 6.2.2 Motherboard Stackup for Backplane Designs

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    • 6.2.3 Backplane Stripline Stackup

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    • 6.2.4 Cable Interconnect With Backplane

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• PCI-X Layout Guidelines 7

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  • 7.1 PCI Voltage Levels

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  • 7.2 PCI/X Clocking Modes

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  • 7.3 PCI General Layout Guidelines

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  • 7.4 PCI-X Layout Guidelines For Slot Configurations

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    • 7.4.1 Protection Circuitry for Add-in Cards

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    • 7.4.2 PCI Clock Layout Guidelines

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    • 7.4.3 Connecting Intel® 31244 PCI-X to Serial ATA Controller to Single-Slot

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    • 7.4.4 Embedded Intel® 31244 PCI-X to Serial ATA Controller Single PCI-X Load

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    • 7.4.5 Embedded Intel® 31244 PCI-X to Serial ATA Controller Design With Multiple PCI-X Loads

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• Cables and Connectors 8

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  • 8.1 Cabling

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    • 8.1.1 Serial ATA Cable

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• Voltage Power Delivery 9

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  • 9.1 Intel® 31244 PCI-X to Serial ATA Controller Core Supply Voltage: Providing 2.5 V in 3.3 V System

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• Test Methodology 10

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  • 10.1 Extended Voltage Mode

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    • 10.1.1 Extended Voltage Mode Receiver Model

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    • 10.1.2 Extended Voltage Mode Driver Model

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• Terminations: Pull-down/Pull-ups 11

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• Intel® IQ31244 PCI-X to Serial ATA Controller Evaluation Platform Board 12

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  • 12.1 Features

    68
• Debug Connectors and Logic Analyzer Connectivity 13

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  • 13.1 Probing PCI-X Signals

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• Design for Manufacturing 14

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• Thermal Solutions 15

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  • 15.1 Thermal Recommendations

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• References 16

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  • 16.1 Related Documents

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  • 16.2 Electronic Information

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• Intel® IQ31244 Controller Evaluation Platform Board Bill of Materials A

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