Hitachi H*/3694F-ZTAT Manuale Utente
![Hitachi](https://files.manualsbrain.com/attachments/318a30c9d46cae1a03ff29c8e1a8ce7b06c25f29/common/fit/150/50/c3659964771301ddbc1d53d08b2407adc4af72464bc0f65ffa4212552d47/brand_logo.png)
Rev. 1.0, 07/01, page 294 of 372
Applicable
Values
Reference
Item
Symbol
Pins
Test Condition
Min
Typ
Max
Unit
Figure
RES
pin low
width
t
REL
RES
At power-on and in
modes other than
those below
modes other than
those below
t
rc
—
—
ms
Figure 20-2
In active mode and
sleep mode
operation
sleep mode
operation
10
—
—
t
cyc
Input pin high
width
width
t
IH
NMI
,
IRQ0
to
IRQ3
,
WKP0
to
WKP5
,
TMCIV,
TMRIV,
TRGV,
TMRIV,
TRGV,
ADTRG
,
FTIOA to
FTIOD
FTIOD
2
—
—
t
cyc
t
subcyc
Figure 20-3
Input pin low
width
width
t
IL
NMI
,
IRQ0
to
IRQ3
,
WKP0
to
WKP5
,
TMCIV,
TMRIV,
TRGV,
TMRIV,
TRGV,
ADTRG
,
FTIOA to
FTIOD
FTIOD
2
—
—
t
cyc
t
subcyc
Figure 20-3
Notes: 1. When an external clock is input, the minimum system clock oscillation frequency is
1.0 MHz.
2. Determined by MA2, MA1, MA0, SA1, and SA0 of system control register 2 (SYSCR2).