Intel IA-32 Manuale Utente

7-52 Vol. 3A

other logical processors in the physical package. For this reason, halting idle logical processors
optimizes the performance.

5

 If all logical processors within a physical package are halted, the

processor will enter a power-saving state.

An operating system may also consider replacing HLT with MONITOR/MWAIT in its C1 idle
loop. An example is shown in Example 7-7: 

// WorkQueue is a memory location indicating there is a thread 
// ready to run.  A non-zero value for WorkQueue is assumed to
// indicate the presence of work to be scheduled on the processor.
// The following example assumes that the necessary padding has been 
// added surrounding WorkQueue to eliminate false wakeups
// The idle loop is entered with interrupts disabled.
WHILE (1) {

IF (WorkQueue) THEN {
// Schedule work at WorkQueue

} ELSE 

{

// No work to do - wait in appropriate C-state handler depending 
// on Idle time accumulated

IF (IdleTime >= IdleTimeThreshhold) THEN {

// Call appropriate C1, C2, C3 state handler, C1 
// handler shown below
}

}

}
// C1 handler uses a Halt instruction
VOID C1Handler() 
{

MONITOR WorkQueue // Setup of eax with WorkQueue LinearAddress, 

// ECX, EDX = 0

IF (WorkQueue != 0) THEN {

STI
MWAIT

// EAX, ECX = 0

}

}

5. Excessive transitions into and out of the HALT state could also incur performance penalties. Operating

systems should evaluate the performance trade-offs for their operating system.