ARM R4 Manuale Utente
Power Control
ARM DDI 0363E
Copyright © 2009 ARM Limited. All rights reserved.
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disabled and finish with a Data Synchronization Barrier operation. When all the state of the
processor is saved the processor executes a
processor is saved the processor executes a
WFI
instruction. The STANDBYWFI signal is
asserted to indicate that the processor can enter Shutdown mode.
10.2.5
Communication to the Power Management Controller
You can use a Power Management Controller (PMC) to control the powering up and powering
down of the processor. The communication mechanism between the processor and the PMC is
a memory-mapped controller that is accessed by the processor performing Strongly-Ordered
accesses to it.
down of the processor. The communication mechanism between the processor and the PMC is
a memory-mapped controller that is accessed by the processor performing Strongly-Ordered
accesses to it.
The STANDBYWFI signal from the processor informs the PMC of the powerdown mode to
adopt.
adopt.
The STANDBYWFI signal can also signal that the processor is ready to have its power state
changed. STANDBYWFI is asserted in response to a
changed. STANDBYWFI is asserted in response to a
WFI
operation.