ARM R4 Manuale Utente

ARM DDI 0363E

11-41

ID013010

The processor takes a debug exception when a software debug event occurs while in Monitor 
debug-mode. Prefetch Abort and Data Abort Vector catch debug events are ignored. The debug 
software must carefully program certain debug events to prevent the processor from entering an 
unrecoverable state. If the processor takes a debug exception because of a breakpoint, BKPT, or 
vector catch debug event, the processor performs the following actions:

•

sets the DSCR[5:2] method-of-entry bits to indicate that a breakpoint occurred

•

sets the CP15 IFSR and IFAR registers as described in Effect of debug exceptions on CP15 
registers and WFAR on page 11-42

•

performs the same sequence of actions as in a Prefetch Abort exception by:
—

updating the SPSR_abt with the saved CPSR

—

changing the CPSR to abort mode and the state indicated by the TE bit with normal 
interrupts and imprecise aborts disabled

—

setting R14_abt as for a regular Prefetch Abort exception, that is, this register holds 
the address of the cancelled instruction plus 

0x04

—

setting the PC to the appropriate Prefetch Abort vector.

 The Prefetch Abort handler is responsible for checking the IFSR to determine if a debug 
exception or other kind of Prefetch Abort exception caused the exception entry. If the cause is 
a debug exception, the Prefetch Abort handler must branch to the debug monitor. The R14_abt 
register holds the address of the instruction to restart.

If the processor takes a debug exception because of a watchpoint debug event, the processor 
performs the following actions:

•

sets the DSCR[5:2] method-of-entry bits to indicate that a precise watchpoint occurred

•

sets the CP15 DFSR, DFAR, and WFAR registers as described in Effect of debug 
exceptions on CP15 registers and WFAR on page 11-42

•

performs the same sequence of actions as in a Data Abort exception by:
—

updating the SPSR_abt with the saved CPSR

—

changing the CPSR to the state indicated by the TE bit with normal interrupts and 
imprecise aborts disabled

—

setting R14_abt as a regular Data Abort exception, that is, this register gets the 
address of the cancelled instruction plus 

0x08

—

setting the PC to the appropriate Data Abort vector.

 The Data Abort handler must check the DFSR to determine if the exception entry was caused 
by a Debug exception or other kind of Data Abort exception. If the cause is a Debug exception, 
the Data Abort handler must branch to the debug monitor. The R14_abt register holds the 
address of the instruction to restart.