ARM R4 Manuale Utente

ARM DDI 0363E

14-35

ID013010

Table 14-28 lists the permitted instruction combinations. Any instruction can be conditional or 
flag-setting unless otherwise stated. Only the exact instruction combinations listed in 
Table 14-28 can be dual issued, provided you ensure the instruction combinations obey the rules 
specified in Dual issue rules on page 14-34.

Case A

Any instruction other than load/store multiple/double, 
flag-setting multiply, non-VFP coprocessor operations, 
miscellaneous processor control instructions

a

, or floating 

point instructions if floating point logic is not included in 
the processor

B #immed

IT

NOP

Case A-F

b

Any floating point instructions, excluding load/store 
multiple, double precision 

CDP

 instructions, 

VCVT.F64.F32

, 

and 

VMRS

 and 

VMSR

.

Case B1

LDR <Rt>, [<Rn>, #<imm>]

c

LDR <Rt>, [<Rn>, <Rm>]

LDR <Rt>, [<Rn>, <Rm>, LSL #1, 2 or 3]

Any data processing instruction that does not 
require a shift by a register value.

d

Any bitfield, saturate or bit-packing 
instruction.

e

Any signed or unsigned extend instruction.

f

Any 

SIMD

 add or subtract instruction.

g

Other miscellaneous instructions.

h

Case B1-F

Any single-precision CDP

i

, excluding 

"VMOV.F32 <Sd>, #<imm>"

, 

VNEG.F32

, 

VABS.F32

, 

VCVT.F64.F32

, 

VDIV.F32

, and 

VSQRT.F32

.

32-bit transfers to and from the floating-point 
register file

.

Case B2

STR <Rt>, [<Rn>, #<imm>]

As for Case B1.

Case B2-F

As for Case B1-F

Case C

MOV <Rd>, #immed

jk

MOVW <Rd>, #immed

MOV <Rd>, <Rm>

Any data processing instruction.

Any bitfield, saturate or bit-packing 
instruction.

Any signed or unsigned extend instruction.

Any 

SIMD

 add or subtract instruction.

Other miscellaneous instructions.

32-bit transfers to and from the floating-point 
register file

l

.

,

m

Any single-precision 

CDP

, excluding 

"VMOV.S32 <Sd>, 

#<imm>"

, 

VCVT.F64.F32

, 

VABS.F32

, and 

VNEG.F32

.

As for case C or C-F.

Case F2_ld

VLDR.F32

n

As for Case B1 or Case B1-F