ARM R4 Manuale Utente

ARM DDI 0363E

Copyright © 2009 ARM Limited. All rights reserved.

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List of Tables
Cortex-R4 and Cortex-R4F Technical Reference
Manual

Change History ............................................................................................................................... ii

Configurable options ................................................................................................................. 1-13

Configurable options at reset .................................................................................................... 1-15

ID values for different product versions .................................................................................... 1-25

Register mode identifiers ............................................................................................................ 2-8

GE[3:0] settings ........................................................................................................................ 2-12

PSR mode bit values ................................................................................................................ 2-14

Exception entry and exit ............................................................................................................ 2-16

Configuration of exception vector address locations ................................................................ 2-26

Exception vectors ...................................................................................................................... 2-26

Jazelle register instruction summary ......................................................................................... 2-27

Reset modes ............................................................................................................................... 3-7

System control coprocessor register functions ........................................................................... 4-3

Summary of CP15 registers and operations ............................................................................... 4-9

Main ID Register bit functions ................................................................................................... 4-15

Cache Type Register bit functions ............................................................................................ 4-16

TCM Type Register bit functions ............................................................................................... 4-16

MPU Type Register bit functions .............................................................................................. 4-17

Processor Feature Register 0 bit functions ............................................................................... 4-19

Processor Feature Register 1 bit functions ............................................................................... 4-19

Debug Feature Register 0 bit functions .................................................................................... 4-20

Memory Model Feature Register 0 bit functions ....................................................................... 4-22

Memory Model Feature Register 1 bit functions ....................................................................... 4-23

Memory Model Feature Register 2 bit functions ....................................................................... 4-24

Memory Model Feature Register 3 bit functions ....................................................................... 4-25

Instruction Set Attributes Register 0 bit functions ..................................................................... 4-26

Instruction Set Attributes Register 1 bit functions ..................................................................... 4-28