Lucent Technologies MN102F75K Manuale Utente

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Serial Interfaces
Serial Interface Setup Examples
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MN102H75K/F75K/85K/F85K LSI User Manual
138
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Reception must be enabled for 
the circuit to detect a stop 
sequence.
2.
When you perform step 1, the SBT0 output signal goes high. One cycle later, 
the SBO0 output signal also goes high, signalling the stop sequence. The 
SC0ISP flag of SC0STR becomes 1. The SC0IST and SC0ISP flags are both 
cleared by a write to or read from the serial port 0 transmit/receive buffer.
Figure 5-13 shows an example timing chart.
Figure 5-13 Master Transmitter Timing in I
2
C Mode (with ACK)
b7 b6 b5 b4 b3 b2 b1 b0
b6 b5 b4 b3 b2 b1 b0
ACK
b7
ACK
Tx interrupt request
Stop detection bit = 1
Start detection bit = 1
I
2
C sequence
output bit
Write to
SC0TRB
SBO0 output
SBT0 output
Data tx 1
Start sequence
Tx interrupt request
Data tx 2
Stop sequence