Agilent Technologies 66309B Manuale Utente

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Language Dictionary - 8
135
Common Commands
 
*CLS
 
This command causes the following actions (see chapter 7 for the descriptions of all registers):
u Clears the Standard Event Status, Operation Status Event, and Questionable Status Event registers
u Clears the Status Byte and the Error Queue
u If *CLS immediately follows a program message terminator (<NL>), then the output queue and the
MAV bit are also cleared.
   
 
Command Syntax
 
*CLS
 
Parameters
 
None
 
*ESE
 
This command programs the Standard Event Status Enable register bits. The programming determines
which events of the Standard Event Status Event register (see *ESR?) are allowed to set the ESB (Event
Summary Bit) of the Status Byte register.  A "1" in the bit position enables the corresponding event. All
of the enabled events of the Standard Event Status Event Register are logically ORed to cause the Event
Summary Bit (ESB) of the Status Byte Register to be set. The query reads the Standard Event The query
reads the Standard Event Status Enable register.
 Table 8-6. Bit Configuration of Standard Event Status Enable Register
 
Bit Position
 
7
 
6
 
5
 
4
 
3
 
2
 
1
 
0
 
Bit Name
 
PON
 
0
 
CME
 
EXE
 
DDE
 
QUE
 
0
 
OPC
 
Bit Weight
 
128
 
64
 
32
 
16
 
8
 
4
 
2
 
1
 
PON = Power-on has occurred
 
CME = Command error
 
EXE = Execution error
 
DDE = Device-dependent error
 
QUE = Query error
 
OPC = Operation complete
   
 
Command Syntax
 
*ESE <NRf>
 
Parameters
 
0 to 255
 
Power-On Value
 
(See *PSC)
 
Examples
 
*ESE 129
 
Query Syntax
 
*ESE?
 
Returned Parameters
 
<NR1>(Register value)
 
Related Commands
 
*ESR?     *PSC     *STB?
CAUTION:
If *PSC is programmed to 0, the *ESE command causes a write cycle to nonvolatile
memory. Nonvolatile memory has a finite maximum number of write cycles. Programs
that repeatedly cause write cycles to nonvolatile memory can eventually exceed the
maximum number of write cycles and cause the memory to fail.