Atmel ARM-Based Evaluation Kit AT91SAM9N12-EK AT91SAM9N12-EK Scheda Tecnica

5-30

ARM DDI0198D

Each TCM interface has a two word entry write buffer. This is required to de-pipeline 
the address and data values produced by the ARM9EJ-S core so that non-speculative 
writes can be made to memory with SRAM characteristics peformed without 
introducing stall cycles. 

The ARM9EJ-S core read requests take priority over writes, and consequently TCM 
transactions can be out of order with respect to instruction execution. If a read access 
occurs to a location that also has a corresponding entry in the write-buffer, then data is 
forwarded from the write-buffer. If it is necessary to ensure that all outstanding writes 
have completed on the TCM interface then the CP15 drain write buffer instruction can 
be used (

MCR p15, 0, Rd, c7, c10, 4

). This instruction does not complete execution 

until all oustanding buffered writes (TCM and AHB) have been completed.

To guarantee that the TCM write buffers have been drained and that all outstanding 
requests on the TCM interface have completed, a drain write buffer instruction must be 
used prior to disabling either of the TCM regions.