Atmel ARM-Based Evaluation Kit AT91SAM9N12-EK AT91SAM9N12-EK Scheda Tecnica
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AT91SAM9N12-EK
1021
SAM9N12/SAM9CN11/SAM9CN12 [DATASHEET]
11063K–ATARM–05-Nov-13
45.6.10 AES Initialization Vector Register x
Name: AES_IVRx
Address:
0xF000C060
Access: Write-only
• IV: Initialization Vector
The four 32-bit Initialization Vector registers set the 128-bit Initialization Vector data block that is used by some modes of opera-
tion as an additional initial input.
tion as an additional initial input.
AES_IVR0 corresponds to the first word of the Initialization Vector, AES_IVR3 to the last one.
These registers are write-only to prevent the Initialization Vector from being read by another application.
For CBC, OFB and CFB modes, the IV input value corresponds to the initialization vector.
For CTR mode, the IV input value corresponds to the initial counter value.
Note:
These registers are not used in ECB mode and must not be written.
31
30
29
28
27
26
25
24
IV
23
22
21
20
19
18
17
16
IV
15
14
13
12
11
10
9
8
IV
7
6
5
4
3
2
1
0
IV