Atmel ARM-Based Evaluation Kit for SAM4S16C, 32-Bit ARM® Cortex® Microcontroller ATSAM4S-WPIR-RD ATSAM4S-WPIR-RD Scheda Tecnica

121

SAM4S Series [DATASHEET]

Atmel-11100G-ATARM-SAM4S-Datasheet_27-May-14

Examples

AND

R9, R2, #0xFF00

ORREQ

R2, R0, R5

ANDS

R9, R8, #0x19

EORS

R7, R11, #0x18181818 

BIC

R0, R1, #0xab

ORN

R7, R11, R14, ROR #4

ORNS

R7, R11, R14, ASR #32

Arithmetic Shift Right, Logical Shift Left, Logical Shift Right, Rotate Right, and Rotate Right with Extend.
Syntax

op{S}{cond} Rd, Rm, Rs

op{S}{cond} Rd, Rm, #n

RRX{S}{cond} Rd, Rm

where:
opis one of:
ASR Arithmetic Shift Right.
LSL Logical Shift Left.
LSR Logical Shift Right.
ROR Rotate Right.
Sis an optional suffix. If S is specified, the condition code flags are updated on the result of the operation, see 

.

Rdis the destination register.
Rmis the register holding the value to be shifted.
Rsis the register holding the shift length to apply to the value in Rm. Only the least 
significant byte is used and can be in the range 0 to 255.
nis the shift length. The range of shift length depends on the instruction:
ASR shift length from 1 to 32
LSL shift length from 0 to 31
LSR shift length from 1 to 32
ROR shift length from 0 to 31

MOVS Rd, Rm is the preferred syntax for LSLS Rd, Rm, #0.

Operation
ASR, LSL, LSR, and ROR move the bits in the register Rm to the left or right by the number of places specified by 

constant n or register Rs.
RRX moves the bits in register Rm to the right by 1. 
In all these instructions, the result is written to Rd, but the value in register Rm remains unchanged. For details on 

what result is generated by the different instructions, see 

.

Restrictions
Do not use SP and do not use PC.