Atmel ARM-Based Evaluation Kit for SAM4S16C, 32-Bit ARM® Cortex® Microcontroller ATSAM4S-WPIR-RD ATSAM4S-WPIR-RD Scheda Tecnica

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SAM4S Series [DATASHEET]

Atmel-11100G-ATARM-SAM4S-Datasheet_27-May-14

If S is specified, these instructions:



Update the N and Z flags according to the result



Can update the C flag during the calculation of Operand2, see 



Do not affect the V flag.

Examples

MOVS

R11, #0x000B

; Write value of 0x000B to 

R11, flags get updated

MOV

R1, #0xFA05

; Write value of 0xFA05 to 

R1, flags are not updated

MOVS

R10, R12

; Write value in R12 to R10, 

flags get updated

MOV

R3, #23

; Write value of 23 to R3

MOV

R8, SP

; Write value of stack pointer to R8

MVNS

R2, #0xF

; Write value of 0xFFFFFFF0 (bitwise inverse of 0xF)

; to the R2 and update flags.

Move Top.
Syntax

MOVT{cond} Rd, #imm16

where:
condis an optional condition code, see 

.

Rdis the destination register.
imm16is a 16-bit immediate constant.
Operation
MOVT writes a 16-bit immediate value, imm16, to the top halfword, Rd[31:16], of its destination register. The write 

does not affect Rd[15:0].
The MOV, MOVT instruction pair enables to generate any 32-bit constant.
Restrictions

 must not be SP and must not be PC.

Condition Flags
This instruction does not change the flags.
Examples

MOVT

R3, #0xF123 ; Write 0xF123 to upper halfword of R3, lower halfword

; and APSR are unchanged.

Reverse bytes and Reverse bits.
Syntax

op{cond} Rd, Rn

where:
opis any of:
REV Reverse byte order in a word.