Atmel ARM-Based Evaluation Kit for SAM4S16C, 32-Bit ARM® Cortex® Microcontroller ATSAM4S-WPIR-RD ATSAM4S-WPIR-RD Scheda Tecnica
Codici prodotto
ATSAM4S-WPIR-RD
807
SAM4S Series [DATASHEET]
Atmel-11100G-ATARM-SAM4S-Datasheet_27-May-14
36.8.7 USART Interrupt Disable Register
Name:
US_IDR
Address:
0x4002400C (0), 0x4002800C (1)
Access:
Write-only
For SPI specific configuration, see “USART Interrupt Disable Register (SPI_MODE)” on page 809.
The following configuration values are valid for all listed bit names of this register:
0: No effect
1: Disables the corresponding interrupt.
The following configuration values are valid for all listed bit names of this register:
0: No effect
1: Disables the corresponding interrupt.
• RXRDY: RXRDY Interrupt Disable
• TXRDY: TXRDY Interrupt Disable
• RXBRK: Receiver Break Interrupt Disable
• ENDRX: End of Receive Transfer Interrupt Disable (available in all USART modes of operation)
• ENDTX: End of Transmit Interrupt Disable (available in all USART modes of operation)
• OVRE: Overrun Error Interrupt Enable
• FRAME: Framing Error Interrupt Disable
• PARE: Parity Error Interrupt Disable
• TIMEOUT: Time-out Interrupt Disable
• TXEMPTY: TXEMPTY Interrupt Disable
• ITER: Max Number of Repetitions Reached Interrupt Disable
• TXBUFE: Buffer Empty Interrupt Disable (available in all USART modes of operation)
• RXBUFF: Buffer Full Interrupt Disable (available in all USART modes of operation)
• NACK: Non AcknowledgeInterrupt Disable
• RIIC: Ring Indicator Input Change Disable
31
30
29
28
27
26
25
24
–
–
–
–
–
–
–
MANE
23
22
21
20
19
18
17
16
–
–
–
–
CTSIC
DCDIC
DSRIC
RIIC
15
14
13
12
11
10
9
8
–
–
NACK
RXBUFF
TXBUFE
ITER
TXEMPTY
TIMEOUT
7
6
5
4
3
2
1
0
PARE
FRAME
OVRE
ENDTX
ENDRX
RXBRK
TXRDY
RXRDY