Intel E3815 FH8065301567411 Scheda Tecnica
Codici prodotto
FH8065301567411
Intel
®
Atom™ Processor E3800 Product Family
2772
Datasheet
20.6.85
OSD1FIFOS—Offset 130h
Output Stream Descriptor 1 FIFO Size
Access Method
Default: 0000h
20.6.86
OSD1FMT—Offset 132h
Output Stream Descriptor 1 Format
Access Method
Default: 0000h
Bit
Range
Default &
Access
Description
15:3
0000h
RO
RESERVED0:
reserved
2:0
04h
RO
FIFO_WATERMARK:
Indicates the minimum number of bytes free in the FIFO before
the controller will start a fetch of data. The HD Audio controller hardwires the FIFO
Watermark either 32B or 64B based on the following. For output streams the FIFOW
value is determined by the EM4.OSRWS SEM4.OSRWS field.
Type:
Memory Mapped I/O Register
(Size: 16 bits)
OSD1FIFOS:
AZLBAR Type:
PCI Configuration Register (Size: 32 bits)
AZLBAR Reference:
[B:0, D:27, F:0] + 10h
15
12
8
4
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
FIFO_SIZ
E
Bit
Range
Default &
Access
Description
15:0
00h
RW
FIFO_SIZE:
Indicates the maximum number of bytes that could be fetched by the
controller at one time. This is the maximum number of bytes that may have been DMA d
into memory but not yet transmitted on the link and is also the maximum possible value
that the PICB count will increase by at one time. The FIFO size is calculated based on
factors including the stream format programmed in OSD1FMT register. As the default
value is zero, SW must write to the OSD1FMT register to kick of the FIFO size calculation
and read back to find out the HW allocated FIFO size.
Type:
Memory Mapped I/O Register
(Size: 16 bits)
AZLBAR Type:
PCI Configuration Register (Size: 32 bits)
AZLBAR Reference:
[B:0, D:27, F:0] + 10h