Intel E3815 FH8065301567411 Scheda Tecnica
Codici prodotto
FH8065301567411
Intel
®
Atom™ Processor E3800 Product Family
592
Datasheet
Default: 00000000h
14.10.155 VSYNC_A—Offset 60014h
Pipe A Vertical Sync Register
Access Method
Default: 00000000h
31
28
24
20
16
12
8
4
0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
RE
SE
RVED
PIP
E
_A_VE
R
TICAL
_
B
LANK_END
RESE
RVED
_1
PIP
E
_A_VE
R
TICAL
_
B
LANK_ST
AR
T
Bit
Range
Default &
Access
Field Name (ID): Description
31:29
0b
RW
RESERVED:
Read Only.
28:16
0b
RW
PIPE_A_VERTICAL_BLANK_END:
This 13-bit field specifies the Vertical Blank End
position expressed in terms of the absolute Line number relative to the vertical active
display start. The value programmed should be the VBLANK End line position, where the
first active line is considered line 0, the second active line is considered line 1, etc. The
end of vertical blank should be after the start of vertical blank and before or equal to the
vertical total. This register should be loaded with the Vactive+BottomBorder+VBlank-1.
For interlaced display modes, hardware automatically divides this number by 2 to get
the vertical blank end in each field. It does not count the two half lines that get added
when operating in modes with half lines.
If this pipe is connected to the TVout port or Panel Fitter 2 the border must be zero. In
that case this register is programmed to the same value as the VTOTAL register.
15:13
0b
RW
RESERVED_1:
Read Only.
12:0
0b
RW
PIPE_A_VERTICAL_BLANK_START:
This 13-bit field specifies the Vertical Blank Start
expressed in terms of the absolute line number relative to the vertical active display
start. The value programmed should be the VBLANK Start line position, where the first
active line is considered line 0, the second active line is considered line 1, etc. Minimum
vertical blank size is required to be at least three lines. Blank should start after the end
of active. This register is loaded with the Vactive+BottomBorder-1. For interlaced
display modes, hardware automatically divides this number by 2 to get the vertical
blank start in each field. It does not count the two half lines that get added when
operating in modes with half lines.
If this pipe is connected to the TVout port or Panel Fitter 2 the border must be zero. In
that case this register is programmed to the same value as the VACTIVE register.
Type:
Memory Mapped I/O Register
(Size: 32 bits)
Offset:
GTTMMADR_LSB Type:
PCI Configuration Register (Size: 32
bits)
GTTMMADR_LSB Reference:
GTTMMADR_LSB Reference:
[B:0, D:2, F:0] + 10h