Motorola CPCI-6020 ユーザーズマニュアル
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CPCI-6020 CompactPCI Single Board Computer Installation and Use (6806800A51C)
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Introduction
1.1
Features
The following table summarizes the features of the CPCI-6020 single-board computers.
Table 1-1 Features
Feature
Description
Processor
Single MPC7410 Processor
Core Frequency up to 500 MHz for MPC7410
Bus Clock Frequency of 100 MHz
Address and data bus parity
Core Frequency up to 500 MHz for MPC7410
Bus Clock Frequency of 100 MHz
Address and data bus parity
L2 Cache
2 MB back side L2 Cache using pipeline burst-mode SRAMS
Data bus parity
Data bus parity
Flash
Xport Channel 0 (Bank A): 32 MB on-board using one 256 megabit device.
Xport Channel 1 (Bank B): 1 MB socketed flash using two 512 kilobit devices.
Bank A/B Reset vector select jumpers.
Xport Channel 1 (Bank B): 1 MB socketed flash using two 512 kilobit devices.
Bank A/B Reset vector select jumpers.
SDRAM
Double-Bit-Error detect, Single-Bit-Error correct across 72 bits
Two connectors, one behind each Harrier, for use with RAM500 stacking
SDRAM mezzanines. Using 512 megabit SDRAM devices on the mezzanine
will allow a maximum of 2 GB memory.
Two connectors, one behind each Harrier, for use with RAM500 stacking
SDRAM mezzanines. Using 512 megabit SDRAM devices on the mezzanine
will allow a maximum of 2 GB memory.
Memory Controllers
Harriers’ SMC (System Memory Controller).
PCI Host Bridges
Harriers’ PHB (PCI Host Bridge).
Interrupt Controller
Harriers’ MPIC (Multi-Processor Interrupt Controller).
PCI Interfaces
Dual 33 MHz, 32/64-bit PCI 2.1 busses bridging from the processor bus, one
PCI Bus also capable of 66 MHz
+3.3 V/+5 V universal signaling interface
One PMC slot
Connection through the J4 connector to the backplane
Address/data parity per PCI specification
PCI Bus also capable of 66 MHz
+3.3 V/+5 V universal signaling interface
One PMC slot
Connection through the J4 connector to the backplane
Address/data parity per PCI specification
Ethernet Interface
Two 10BaseT/100BaseTx interfaces based on Intel 82551IT device.
One port is routed to the backplane, the other port is routed to front panel
(standard product). The latter port can also be routed to backplane, but it is
determined by a custom-build option. Contact the custom solution center for
more information.
AT93C46 SROMs for 82551IT configuration
One port is routed to the backplane, the other port is routed to front panel
(standard product). The latter port can also be routed to backplane, but it is
determined by a custom-build option. Contact the custom solution center for
more information.
AT93C46 SROMs for 82551IT configuration
SROM
Two 8 KB dual-address I
2
C serial EEPROM devices for Vital Product Data
and user configuration data
256-byte standard I2C serial EEPROMs (on mezzanines) for memory SPD
256-byte standard I2C serial EEPROMs (on mezzanines) for memory SPD
CompactPCI
Interface
Interface
Intel 21154 PCI-to-PCI Bridge interfaces to Compact PCI Bus
Capable of driving seven slots
64-bit primary bus/64-bit secondary bus interface
Up to 33 MHz operation
Capable of driving seven slots
64-bit primary bus/64-bit secondary bus interface
Up to 33 MHz operation
Form Factor
6U Eurocard