Intel D845GVSR D845GVSRL ユーザーズマニュアル
製品コード
D845GVSRL
Intel Desktop Board D845GVSR Technical Product Specification
92
4.4.9 Chipset Configuration Submenu
To access this menu, select Advanced on the menu bar and then Chipset Configuration.
Maintenance
Main
Advanced Security
Power
Boot
Exit
PCI
Configuration
Boot
Configuration
Peripheral Configuration
IDE Configuration
Diskette Configuration
Event Log Configuration
Video Configuration
USB Configuration
Chipset Configuration
Table 60. Chipset Configuration Submenu
Feature Options
Description
ISA Enable Bit
• Disabled (default)
• Enabled
• Enabled
When set to Enable, a PCI-to-PCI bridge will only
recognize I/O addresses that do not alias to an ISA
range (within the bridge’s assigned I/O range).
recognize I/O addresses that do not alias to an ISA
range (within the bridge’s assigned I/O range).
PCI Latency Timer
• 32 (default)
• 64
• 96
• 128
• 160
• 192
• 224
• 248
• 64
• 96
• 128
• 160
• 192
• 224
• 248
Allows you to control the time (in PCI bus clock
cycles) that an agent on the PC bus can hold the bus
when another agent has requested the bus.
cycles) that an agent on the PC bus can hold the bus
when another agent has requested the bus.
Extended Configuration
• Default (default)
• User Defined
• User Defined
Allows the setting of extended configuration options.
SDRAM Frequency
• Auto (default)
• 200 MHz
• 266 MHz
• 333 MHz
• 200 MHz
• 266 MHz
• 333 MHz
Allows override of detected memory frequency value.
NOTE: If SDRAM Frequency is changed, you must
reboot for the change to take effect. Also, after
changing this setting and rebooting, the System
Memory Speed parameter in the Main menu will
reflect the new value
reboot for the change to take effect. Also, after
changing this setting and rebooting, the System
Memory Speed parameter in the Main menu will
reflect the new value
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