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Schematics / Layouts hl9_15

NHL-12

Issue 3 05/2005

Copyright © Nokia 2005. All rights reserved.

Page 1

8 - Schematics hl9_15

Note: Schematic Diagrams that were not amended are included in the hl9_14 diagrams

Table of Contents

Page No

Main Level v.5.0, ed.117

2

Bluetooth Circuit v.2.0, ed.73

3

Bluetooth Antenna Connection v.1.0, ed.20

4

Clock Buffer for 12MHz Clock from APE v.1.0, ed.14

5

Tx Matching Circuit v.2.0, ed.21

6

Bluetooth Filter and Balun v.1.0, ed.10

7

Voltage Regulator v.14, ed.15

8

Bluetooth Test Interface v.1.0, ed.16

9

RF Top Level v.0.1, ed. 60

10

Helgo v.4.0, ed.117

11

Power Amplifier v.0.1, ed.65

12

BB Top Level v.0.0, ed.42

13

Flash Memory v.2.0, ed.44

14

SIM Reader v.0.0, ed.12

15

UPP8M v.2.0, ed.111

16

CMT Audio v.0.0, ed.48

17

CMT UI v.0.0, ed.21

18

MMC v.0.0, ed.16

19

DAC Audio v.1.0, ed.141

20

APE UI v.0.0, ed.84

21

256Mbit NAND Flash and Seija Interface ASIC v.1.0, ed. 134

22

APE SDRAM 32Mx16 v.1.0, ed.28

23

APE Power v.7.0, ed.113

24

OMAP1510 v.7.0, ed.175

25

Discrete Power Management v.1.3, ed.128

26