Atmel ARM-Based Evaluation Kit AT91SAM9N12-EK AT91SAM9N12-EK データシート

633

SAM9N12/SAM9CN11/SAM9CN12 [DATASHEET]

11063K–ATARM–05-Nov-13

Name: SPI_CR

0xF0000000 (0), 0xF0004000 (1)

Write-only

0 = No effect.

1 = Enables the SPI to transfer and receive data.

0 = No effect.

1 = Disables the SPI.

As soon as SPIDIS is set, SPI finishes its transfer.

All pins are set in input mode and no data is received or transmitted.

If a transfer is in progress, the transfer is finished before the SPI is disabled.

If both SPIEN and SPIDIS are equal to one when the control register is written, the SPI is disabled.

0 = No effect.

1 = Reset the SPI. A software-triggered hardware reset of the SPI interface is performed.

The SPI is in slave mode after software reset. 

0 = No effect.

1 = The current NPCS will be deasserted after the character written in TD has been transferred. When CSAAT is set, this allows 
to close the communication with the current serial peripheral by raising the corresponding NPCS line as soon as TD transfer has 
completed. 

Refer to 

for more details.

31

30

29

28

27

26

25

24

–

–

–

–

–

–

–

LASTXFER

23

22

21

20

19

18

17

16

–

–

–

–

–

–

–

–

15

14

13

12

11

10

9

8

–

–

–

–

–

–

–

–

7

6

5

4

3

2

1

0

SWRST

–

–

–

–

–

SPIDIS

SPIEN