Atmel ARM-Based Evaluation Kit AT91SAM9N12-EK AT91SAM9N12-EK データシート

Atmel

製品コード

AT91SAM9N12-EK

989

SAM9N12/SAM9CN11/SAM9CN12 [DATASHEET]

11063K–ATARM–05-Nov-13

44.7.18 Base Layer Interrupt Enable Register

Name:

LCDC_BASEIER

Address:

0xF803804C

Access:

Write-only

Reset:

0x00000000

• DMA: End of DMA Transfer Interrupt Enable Register

0: No effect.

1: Interrupt source is enabled.

• DSCR: Descriptor Loaded Interrupt Enable Register

0: No effect.

1: Interrupt source is enabled.

• ADD: Head Descriptor Loaded Interrupt Enable Register

0: No effect.

1: Interrupt source is enabled.

• DONE: End of List Interrupt Enable Register

0: No effect.

1: Interrupt source is enabled.

• OVR: Overflow Interrupt Enable Register

0: No effect.

1: Interrupt source is enabled.

31

30

29

28

27

26

25

24

–

–

–

–

–

–

–

–

23

22

21

20

19

18

17

16

–

–

–

–

–

–

–

–

15

14

13

12

11

10

9

8

–

–

–

–

–

–

–

–

7

6

5

4

3

2

1

0

–

OVR

DONE

ADD

DSCR

DMA

–

–