Intel E3815 FH8065301567411 データシート

Intel

®

 Atom™ Processor E3800 Product Family

2070

Datasheet

Default: 5515ACAAh

4

0h

RW

Chicken bit to enable data appear on NOA post k-align lock 

although k-align block is not achieving lock. This is only for NOA observeability and not 

for other purpose

3:2

0h

RW

KALIGN Mode Select 00 = dynamic kalign all the time. 

Accounts for bit slips on incoming stream which can cause symbol to be detected on 

different bank 10 = dynamic kalign up to L0 x1 = static kalign (same as GDG). 

Assumes symbol always detected on same data bank

1

0h

RW

SKIP Ordered-Set Processing Disable When this configuration bit is 

asserted, then SKIP ordered=sets will be ignored (in EB block). Used in Elastic buffer 

block. 0 = Normal operation. SKIP ordered=sets will be processed by the Elastic Buffer 

1 = SKIP processing disabled.

0

0h

RW

Config bit (chicken bit) to disable the masking logic after 

elec idle ordered set is seen

Message Bus Register

(Size: 32 bits)

Op Codes:
0h - Read, 1h - Write

31

28

24

20

16

12

8

4

0

0 1 0 1 0 1 0 1 0 0 0 1 0 1 0 1 1 0 1 0 1 1 0 0 1 0 1 0 1 0 1 0

cr

i_dfx_patbuf_55_48

cr

i_dfx_patbuf_63_56

cr

i_dfx_patbuf_71_64

cr

i_dfx_patbuf_79_72

31:24

55h

RW

Pattern Buffer Storage See cri_dfx_patbuf[7:0] description.

23:16

15h

RW

Pattern Buffer Storage See cri_dfx_patbuf[7:0] description.

15:8

ACh

RW

Pattern Buffer Storage See cri_dfx_patbuf[7:0] description.

7:0

AAh

RW

Pattern Buffer Storage See cri_dfx_patbuf[7:0] description.