Intel E3815 FH8065301567411 データシート
製品コード
FH8065301567411
Intel
®
Atom™ Processor E3800 Product Family
Datasheet
783
14.11.121 DPB_AUX_CH_DATA5—Offset 64124h
Display Port B AUX Data Register 5 [DevCTG, DevCDV] AuxB Data5 (dprrega_b0.v
auxb_dpr_data5, ql_auxb_d5)
Access Method
Default: 00000000h
14.11.122 DP_AUX_CH_AKSV_HI—Offset 64130h
Display Port AUX Aksv Buffer High [DevCTG-B, DevCDV] AuxB AKSV High
(dprrega_b0.v dpr_aux_aksv_hi)
Access Method
Default: 00000000h
Type:
Memory Mapped I/O Register
(Size: 32 bits)
Offset:
GTTMMADR_LSB Type:
PCI Configuration Register (Size: 32
bits)
GTTMMADR_LSB Reference:
GTTMMADR_LSB Reference:
[B:0, D:2, F:0] + 10h
31
28
24
20
16
12
8
4
0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
AUX_CH_DA
TA5_31
Bit
Range
Default &
Access
Field Name (ID): Description
31:0
0b
RW
AUX_CH_DATA5_31:
0]:
The fifth Dword of the message. The Msbyte is transmitted first. Only used if the
message size is greater than 16. Reads will give the response data after transaction
complete.
Type:
Memory Mapped I/O Register
(Size: 32 bits)
Offset:
GTTMMADR_LSB Type:
PCI Configuration Register (Size: 32
bits)
GTTMMADR_LSB Reference:
GTTMMADR_LSB Reference:
[B:0, D:2, F:0] + 10h
31
28
24
20
16
12
8
4
0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
AK
SV_BIT
S
_7
A
K
SV_BIT
S
_15
A
K
SV_BIT
S
_23
A
K
SV_BIT
S
_31