Intel WESTBRANCH KD915GVWBLPAK10 ユーザーズマニュアル

製品コード
KD915GVWBLPAK10
ページ / 84
 
 39 
2 Technical 
Reference 
What This Chapter Contains 
2.1 Introduction 
Sections 2.2 - 2.6 contain several standalone tables.  Table 10 describes the system memory map, 
Table 11 lists the DMA channels, Table 12 shows the I/O map, Table 13 defines the PCI 
Conventional bus configuration space map, and Table 14 describes the interrupts.  The remaining 
sections in this chapter are introduced by text found with their respective section headings. 
2.2 Memory Resources 
2.2.1 Addressable 
Memory 
The board utilizes 4 GB of addressable system memory.  Typically the address space that is 
allocated for PCI Conventional bus add-in cards, PCI Express configuration space, BIOS (firmware 
hub), and chipset overhead resides above the top of DRAM (total system memory).  On a system 
that has 4 GB of system memory installed, it is not possible to use all of the installed memory due 
to system address space being allocated for other system critical functions.  These functions include 
the following: 
•  BIOS/firmware hub (2 MB) 
•  Local APIC (19 MB) 
•  Digital Media Interface (40 MB) 
•  Front side bus interrupts (17 MB) 
•  PCI Express configuration space (256 MB) 
•  GMCH base address registers, internal graphics ranges, PCI Express ports (up to 512 MB) 
•  Memory-mapped I/O that is dynamically allocated for PCI Conventional and PCI Express  
add-in cards