Fujitsu MB91191 ユーザーズマニュアル
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Block Diagram of FRC Capture
Figure 7.1-2 Block diagram of FRC capture
CIC1
EIV0
EIV1
EIV2
FCIE
FCLR
FCIF
Internal bus
DVRFG1
DVRFG0
DVCFG
DVDFG
EXI2
EXI1
EXI0
Internal bus
SOFT
I0E
I1EE
EI2E
DFGE
CFGE
F0ER
RF1E
FUL
EMP
CLR
INC
Fch
(50ns
FRC2-19
24bit FRC
DVDFG
FIFO-IN
CAPS
CAPD2
CAPD1
CAPD0
IRQ05
(to I-Unit)
FRCD2
FRCD1
FRCD0
(to PPG,RTG,
Servo,
PWC,Timer,
Prescaler)
Captuer REQ
FIFO
8bit x 8 steps
Captuer-Unit
221bit x 8 steps
MSB
LSB
S
OUT
CAPC
CIC0
R
0
2
3
3
7
8
8
15
16
23
70
7
0
70
7
0
2
3
Q
R
R
R
R