データシート (AT80602002697AC)目次Quad-Core Intel® Xeon® Processor 5400 Series11 Introduction91.1 Terminology101.2 State of Data131.3 References132 Quad-Core Intel® Xeon® Processor 5400 Series Electrical Specifications152.1 Front Side Bus and GTLREF152.2 Power and Ground Lands162.3 Decoupling Guidelines162.3.1 VCC Decoupling162.3.2 VTT Decoupling162.3.3 Front Side Bus AGTL+ Decoupling162.4 Front Side Bus Clock (BCLK[1:0]) and Processor Clocking172.4.1 Front Side Bus Frequency Select Signals (BSEL[2:0])172.4.2 PLL Power Supply182.5 Voltage Identification (VID)182.6 Reserved, Unused, and Test Signals212.7 Front Side Bus Signal Groups222.8 CMOS Asynchronous and Open Drain Asynchronous Signals242.9 Test Access Port (TAP) Connection242.10 Platform Environmental Control Interface (PECI) DC Specifications242.10.1 DC Characteristics242.10.2 Input Device Hysteresis252.11 Mixing Processors262.12 Absolute Maximum and Minimum Ratings262.13 Processor DC Specifications272.13.1 Flexible Motherboard Guidelines (FMB)272.13.2 VCC Overshoot Specification382.13.3 Die Voltage Validation392.14 AGTL+ FSB Specifications393 Mechanical Specifications433.1 Package Mechanical Drawings433.2 Processor Component Keepout Zones473.3 Package Loading Specifications473.4 Package Handling Guidelines483.5 Package Insertion Specifications483.6 Processor Mass Specifications483.7 Processor Materials483.8 Processor Markings483.9 Processor Land Coordinates494 Land Listing514.1 Quad-Core Intel® Xeon® Processor 5400 Series Pin Assignments514.1.1 Land Listing by Land Name514.1.2 Land Listing by Land Number615 Signal Definitions715.1 Signal Definitions716 Thermal Specifications796.1 Package Thermal Specifications796.1.1 Thermal Specifications796.1.2 Thermal Metrology906.2 Processor Thermal Features906.2.1 Intel® Thermal Monitor Features906.2.2 On-Demand Mode926.2.3 PROCHOT# Signal936.2.4 FORCEPR# Signal936.2.5 THERMTRIP# Signal946.3 Platform Environment Control Interface (PECI)946.3.1 Introduction946.3.2 PECI Specifications967 Features977.1 Power-On Configuration Options977.2 Clock Control and Low Power States977.2.1 Normal State987.2.2 HALT or Extended HALT State987.2.3 Stop-Grant State1007.2.4 Extended HALT Snoop or HALT Snoop State, Stop Grant Snoop State1017.3 Enhanced Intel SpeedStep® Technology1018 Boxed Processor Specifications1038.1 Introduction1038.2 Mechanical Specifications1058.2.1 Boxed Processor Heat Sink Dimensions (CEK)1058.2.2 Boxed Processor Heat Sink Weight1138.2.3 Boxed Processor Retention Mechanism and Heat Sink Support (CEK)1138.3 Electrical Requirements1138.3.1 Fan Power Supply (Active CEK)1138.3.2 Boxed Processor Cooling Requirements1148.4 Boxed Processor Contents1159 Debug Tools Specifications1179.1 Debug Port System Requirements1179.2 Target System Implementation1179.2.1 System Implementation1179.3 Logic Analyzer Interface (LAI)1179.3.1 Mechanical Considerations1189.3.2 Electrical Considerations118サイズ: 2.97MBページ数: 118Language: Englishマニュアルを開く