Microchip Technology AC164142 マニュアル

目次

• Preface

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  • Introduction

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  • Document Layout

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  • Conventions Used in this Guide

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  • Recommended Reading

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    • Explorer 16 Development Board User’s Guide (DS51589)

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    • MPLAB® C Compiler for PIC24 MCUs and dsPIC® DSCs User’s Guide (DS51288)

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    • dsPIC33F/PIC24H Family Reference Manual and dsPIC33F Family Data Sheets

      7
    • MPLAB® IDE User’s Guide (DS51519)

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  • The Microchip Web Site

    7
  • Development Systems Customer Change Notification Service

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  • Customer Support

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  • Document Revision History

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    • Revision A (March 2011)

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• Chapter 1. Introduction

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  • 1.1 Overview

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    • Figure 1-1: Consumer-band BPSK 7.2 kbps PLM PICtail™ Plus Daughter Board

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  • 1.2 Board Setup

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    • Figure 1-2: Board Setup

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    • Figure 1-3: Signal coupler device

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    • Figure 1-4: Dual-Phase Power Supply Examples

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• Chapter 2. Hardware

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  • 2.1 Functional Overview

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    • Figure 2-1: Consumer-band BPSK 7.2 kbps PLM PICtail™ Plus Daughter Board Block Diagram

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    • 2.1.1 Transmit Path

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      • Figure 2-2: PWM-based Analog signal Generation

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    • 2.1.2 Receive Path

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  • 2.2 Hardware Components

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    • Figure 2-3: Consumer-band BPSK 7.2 kbps PLM PICtail™ Plus Daughter Board Hardware Components

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    • Table 2-1: Consumer-band BPSK 7.2 kbps PLM PICtail™ Plus Daughter Board HARDWARE COMPONENTS

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    • 2.2.1 Transmit-level Set Potentiometer (P1)

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    • 2.2.2 Transmit Amplifier (U1A)

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    • 2.2.3 Output Transistors (T5, T6)

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    • 2.2.4 RCA Connector (CON1)

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    • 2.2.5 HiZ Select Jumper (JP2)

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    • 2.2.6 ADC Input Select Jumper (JP3)

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    • 2.2.7 Tuned Amplifier Transistor (T9)

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    • 2.2.8 Receive Band-pass Filter (U2A, U2B)

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    • 2.2.9 Transient Voltage Suppressor (D7)

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    • 2.2.10 Explorer 16 Development Board PICtail™ Connector (CON2)

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• Chapter 3. Demonstration

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  • 3.1 Software and Tools

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    • 3.1.1 Running the Demonstration Applications

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    • 3.1.2 Configuration Files

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    • 3.1.3 Configuration Settings

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    • 3.1.4 API Functions

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    • 3.1.5 Resource Requirements

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      • Table 3-1: Memory and MIPS Requirements for the Modem

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    • 3.1.6 Developing Custom Applications

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  • 3.2 Demonstration Applications

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    • Table 3-2: memory and MIPS requirement for the modem

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    • 3.2.1 Ping Pong Demonstration

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    • 3.2.2 Sensor Monitoring Demonstration

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    • 3.2.3 Pipe Demonstration

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    • 3.2.4 Stream Demonstration

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    • 3.2.5 Talk Demonstration

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• Appendix A. Board Layout and Schematics

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  • A.1 HV Adapter Board Layout and Schematic

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    • Figure A-1: HV Adapter Board Layout

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    • Figure A-2: HV Adapter Board Schematic

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  • A.2 Consumer-band BPSK 7.2 kbps PLM PICtail™ Plus Daughter Board Layout and Schematics

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    • Figure A-3: Consumer-band BPSK 7.2 kbps PLM PICtail™ Plus Daughter Board Layout

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    • Figure A-4: Consumer-band BPSK 7.2 kbps PLM PICtail™ Plus Daughter Board Schematic Sheet 1 of 2

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    • Figure A-5: Consumer-band BPSK 7.2 kbps PLM PICtail™ Plus Daughter Board Schematic Sheet 2 of 2

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• Appendix B. Bill of Materials (BOM)

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  • Table B-1: Daughter Board Bill of Materials (BOM)

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  • Table B-2: HV Adapter Bill of Materials (BOm)

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• Appendix C. Troubleshooting Guide

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  • C.1 Frequently asked questions

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    • C.1.1 The daughter boards are not able to communicate on the power line. What can I do to fix the problem?

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    • C.1.2 What is the maximum operational range of these daughter boards?

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    • C.1.3 What are the important points to keep in mind while designing a custom hardware solution using the schematics provided by Microchip?

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    • C.1.4 What are the implications of using less than four Output Compare (OC) channels for the daughter board?

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    • C.1.5 What are the implications of running the dsPIC33F DSC at less than 40 MIPS?

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• Worldwide Sales and Service

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