Microchip Technology DM164130-9 マニュアル

目次

• Chapter 1. Overview

  13
• 1.1 Introduction

  13
• 1.2 Highlights

  13
• 1.3 What’s New

  13
• 1.4 Included Items

  13
• 1.5 The Low Pin Count Board

  14
  • Figure 1-1: Demo Board Hardware Layout

    14
  • Table 1-1: Pin Assignments

    14
• 1.6 Software Overview

  15
• 1.7 Running the Demonstrations

  15
• Chapter 2. PIC® MCU Architecture

  17
• 2.1 Introduction

  17
• 2.2 Core Basics

  17
  • Figure 2-1: Simplified Enhanced Mid-Range PIC® MCU Block Diagram

    17
  • Figure 2-2: Simplified Enhanced Mid-Range PIC® MCU Data Block Diagram

    18
  • Figure 2-3: Simplified PIC18 Block Diagram

    19
• 2.3 Data/Program Bus

  20
• 2.4 Accumulator

  20
• 2.5 Instructions

  20
  • Equation 2-1: Instruction Time

    20
  • Example 2-1:

    20
• 2.6 Byte

  21
  • Example 2-2:

    21
• 2.7 Bit

  21
  • Example 2-3:

    21
• 2.8 Literal

  21
  • Example 2-4:

    21
• 2.9 Control

  22
  • Figure 2-4: Enhanced PIC16 General Format for Instructions

    23
  • Figure 2-5: PIC18 General Format for Instructions

    24
• 2.10 Stack Level

  25
• 2.11 Memory Organization

  25
• 2.12 Program Memory

  25
  • 2.12.1 Flash Program Memory

    25
  • 2.12.2 Configuration Words

    25
  • 2.12.3 Device ID

    25
  • 2.12.4 Revision ID

    26
    • Figure 2-6: Enhanced Mid-Range program memory map and call stack

      26
    • Figure 2-7: PIC18 Program Memory Map and Call Stack

      27
  • 2.12.5 User ID

    27
• 2.13 Data Memory

  27
  • 2.13.1 Core Registers

    28
  • 2.13.2 Special Function Registers

    28
  • 2.13.3 General Purpose RAM

    28
  • 2.13.4 Common RAM

    28
• 2.14 Banks

  28
  • Figure 2-8: Enhanced Mid-range Banked Memory Partitioning

    29
  • Figure 2-9: PIC16F1829 Memory Map – The correct bank must be selected before writing/reading from a register

    30
  • Figure 2-10: PIC18F14K22 Data Memory Map

    32
  • Figure 2-11: PIC18F14K22 Special Function Register Map – All of these are in bank 15 which is included in the “Access RAM”

    33
• 2.15 Data EEPROM Memory

  34
• 2.16 Programming Basics

  34
  • 2.16.1 MPASM™ Assembler Operation

    34
    • Figure 2-12: MPASM Assembler Operation

      34
  • 2.16.2 XC8 Operation

    34
    • Figure 2-13: XC8 Operation

      35
    • Figure 2-14: Disassembly Figure

      35
  • 2.16.3 Numbers in the Assembler

    36
    • Table 2-1: Numbers in the Assembler

      36
  • 2.16.4 Numbers in the XC8 Compiler

    36
    • Table 2-2: Numbers in the Compiler

      36
• 2.17 MPASM Assembler Directives

  36
  • 2.17.1 Banksel

    36
  • 2.17.2 cblock

    36
    • Example 2-5:

      36
  • 2.17.3 Org (addr)

    37
  • 2.17.4 End

    37
  • 2.17.5 Errorlevel

    37
    • Example 2-6:

      37
  • 2.17.6 #include

    37
    • Example 2-7:

      37
• Chapter 3. Lessons

  39
• 3.1 Lessons

  40
• 3.2 Lesson 1: Hello World (Turn on an LED)

  41
  • 3.2.1 Introduction

    41
  • 3.2.2 Hardware Effects

    41
  • 3.2.3 Summary

    41
  • 3.2.4 New Registers

    41
    • 3.2.4.1 Both

      41
      • Table 3-1: New Registers for Both Devices

        41
    • 3.2.4.2 LATC

      41
    • 3.2.4.3 PORTC

      41
    • 3.2.4.4 TRISC

      41
      • Table 3-2: TRIS Direction

        41
  • 3.2.5 New Instructions

    42
    • 3.2.5.1 Both

      42
      • Table 3-3: New Instructions for Both Devices

        42
    • 3.2.5.2 bsf

      42
      • Example 3-1:

        42
    • 3.2.5.3 bcF

      42
      • Example 3-2:

        42
    • 3.2.5.4 CLRF

      42
      • Example 3-3:

        42
  • 3.2.6 Assembly

    43
    • 3.2.6.1 Enhanced Mid-range

      43
      • Example 3-4:

        43
    • 3.2.6.2 PIC18

      44
      • Example 3-5:

        44
  • 3.2.7 C Language

    45
    • 3.2.7.1 Enhanced Mid-range

      45
      • Example 3-6:

        45
    • 3.2.7.2 PIC18

      46
• 3.3 Lesson 2: Blink

  47
  • 3.3.1 Introduction

    47
  • 3.3.2 Hardware Effects

    47
  • 3.3.3 Summary

    47
  • 3.3.4 New Registers

    47
    • 3.3.4.1 Both

      47
      • Table 3-4: New Registers for Both Devices

        47
  • 3.3.5 New Instructions

    47
    • 3.3.5.1 Both Devices

      47
      • Table 3-5: New Instructions for Both Devices

        47
        • Example 3-7:

          48
    • 3.3.5.2 PIC18

      48
      • Table 3-6: New Instructions for PIC18

        48
  • 3.3.6 Assembly

    48
    • 3.3.6.1 Enhanced Mid-range

      48
      • Example 3-8:

        48
      • Equation 3-1: Delay Speed

        49
      • Example 3-9:

        49
      • Example 3-10:

        49
    • 3.3.6.2 PIC18

      50
      • Example 3-11:

        50
  • 3.3.7 C Language

    50
    • 3.3.7.1 Both

      50
      • Example 3-12:

        50
      • Example 3-13:

        50
• 3.4 Lesson 3: Rotate

  51
  • 3.4.1 Introduction

    51
  • 3.4.2 Hardware Effects

    51
  • 3.4.3 Summary

    51
  • 3.4.4 New Registers

    51
    • Table 3-7: New Registers for Both Devices

      51
  • 3.4.5 New Instructions

    51
    • 3.4.5.1 Both

      51
      • Table 3-8: New Instructions for Both Devices

        51
    • 3.4.5.2 Enhanced Mid-range

      52
      • Table 3-9: New Instructions for Enhanced Mid-range

        52
    • 3.4.5.3 PIC18

      52
      • Table 3-10: New Instructions for PIC18

        52
        • Figure 3-1: Logic Shift to the Right

          52
        • Figure 3-2: Rotate Right through Carry

          52
  • 3.4.6 Assembly

    52
    • 3.4.6.1 Enhanced Mid-range

      52
      • Example 3-14:

        52
      • Table 3-11: Pin to LED Mapping

        53
      • Table 3-12: LED Rotate

        53
      • Table 3-13: LED Rotate

        53
        • Example 3-15:

          53
    • 3.4.6.2 PIC18

      53
      • Example 3-16:

        53
  • 3.4.7 C Language

    54
    • 3.4.7.1 Both

      54
      • Example 3-17:

        54
      • Example 3-18:

        54
• 3.5 Lesson 4: Analog-to-Digital Conversion

  55
  • 3.5.1 Introduction

    55
  • 3.5.2 Hardware Effects

    55
  • 3.5.3 Summary

    55
    • Equation 3-2:

      55
  • 3.5.4 New Registers

    55
    • 3.5.4.1 Both

      55
      • Table 3-14: New Registers for Both Devices

        55
      • Table 3-15: ADC result that is left justified – Bits in Blue are mirrored to LATC. Bit 6 Reflects DS1, Bit 7 controls DS2, and so forth.

        56
    • 3.5.4.2 PIC16

      56
      • Table 3-16: New Registers for Enhanced Mid-range

        56
    • 3.5.4.3 PIC18

      56
      • Table 3-17: New Registers for PIC18

        56
  • 3.5.5 New Instructions

    57
    • 3.5.5.1 Both

      57
      • Table 3-18: New Instructions for Both Devices

        57
        • Example 3-19:

          57
      • Table 3-19: Before SWAPF

        57
      • Table 3-20: Before SWAPF

        57
        • Example 3-20:

          57
      • Table 3-21: After SWAPF

        57
        • Figure 3-3: SWAPF Diagram

          57
  • 3.5.6 Assembly

    58
    • 3.5.6.1 Enhanced Mid-range

      58
      • Example 3-21:

        58
    • 3.5.6.2 PIC18:

      58
      • Example 3-22:

        58
  • 3.5.7 C Language

    58
    • Example 3-23:

      58
    • Table 3-22: ADRESH Before Shift

      58
    • Table 3-23: Temporary Workspace Register After Shift

      59
• 3.6 Lesson 5: Variable Speed Rotate

  60
  • 3.6.1 Introduction

    60
  • 3.6.2 Hardware Effects

    60
  • 3.6.3 Summary

    60
    • Figure 3-4: Program Flow

      60
  • 3.6.4 New Registers

    60
  • 3.6.5 New Instructions

    60
    • 3.6.5.1 Both

      60
      • Table 3-24: New Instructions for Both Devices

        60
      • Table 3-25: XOR Truth Table

        61
        • Example 3-24:

          61
    • 3.6.5.2 PIC18

      61
      • Table 3-26: New Instructions for PIC18

        61
        • Example 3-25:

          62
  • 3.6.6 Assembly

    62
    • 3.6.6.1 Both

      62
      • Example 3-26:

        62
  • 3.6.7 C Language

    62
    • Example 3-27:

      62
• 3.7 Lesson 6: Debounce

  63
  • 3.7.1 Introduction

    63
    • Figure 3-5: Switch Debouncing

      63
  • 3.7.2 Hardware Effects

    63
  • 3.7.3 Summary

    64
    • Example 3-28:

      64
  • 3.7.4 New Registers

    64
  • 3.7.5 New Instructions

    64
  • 3.7.6 Assembly

    64
    • 3.7.6.1 Enhanced Mid-range

      64
      • Example 3-29:

        64
  • 3.7.7 PIC18

    64
  • 3.7.8 C Language

    64
• 3.8 Lesson 7: Reversible Variable Speed Rotate

  65
  • 3.8.1 Introduction

    65
  • 3.8.2 Hardware Effects

    65
  • 3.8.3 Summary

    65
    • Figure 3-6: Program Flow for Lesson 7

      65
  • 3.8.4 New Registers

    66
  • 3.8.5 New Instructions

    66
    • 3.8.5.1 PIC18

      66
      • Table 3-27:

        66
        • Figure 3-7: Rotate Left without Carry

          66
  • 3.8.6 Assembly

    66
    • 3.8.6.1 Enhanced Mid-range

      66
      • Example 3-30:

        66
    • 3.8.6.2 PIC18

      66
      • Example 3-31:

        67
  • 3.8.7 C Language

    67
    • 3.8.7.1 Both

      67
      • Example 3-32:

        67
• 3.9 Lesson 8: Pulse-Width Modulation (PWM)

  68
  • 3.9.1 Introduction

    68
  • 3.9.2 Hardware Effects

    68
  • 3.9.3 Summary

    68
  • 3.9.4 New Registers

    68
    • 3.9.4.1 Both

      68
      • Table 3-28: New Registers for Both Devices

        68
        • Figure 3-8: PWM Analysis

          69
        • Example 3-33:

          69
        • Equation 3-3: PWM Resolution

          69
        • Figure 3-9: Small Pulse Width

          70
        • Figure 3-10: Greater Pulse Width

          70
      • Table 3-29:

        70
  • 3.9.5 Assembly

    71
    • 3.9.5.1 Enhanced Mid-range

      71
      • Example 3-34:

        71
      • Example 3-35:

        71
    • 3.9.5.2 PIC18

      71
    • 3.9.5.3 C Language

      71
• 3.10 Lesson 9: Timer0

  72
  • 3.10.1 Introduction

    72
  • 3.10.2 Hardware Effects

    72
  • 3.10.3 Summary

    72
  • 3.10.4 New Registers

    72
    • Table 3-30: Enhanced Mid-range New Register

      72
    • 3.10.4.1 PIC18

      73
      • Table 3-31: New Registers for PIC18

        73
  • 3.10.5 Assembly

    73
    • 3.10.5.1 PIC16

      73
      • Example 3-36:

        73
    • 3.10.5.2 PIC18

      73
  • 3.10.6 C Language

    73
• 3.11 Lesson 10: Interrupts and Pull-ups

  74
  • 3.11.1 Introduction

    74
  • 3.11.2 Hardware Effects

    74
  • 3.11.3 Summary

    74
    • 3.11.3.1 Interrupts

      74
      • Figure 3-11: Summary of Interrupt Flow

        74
    • 3.11.3.2 Weak Pull-ups

      75
      • Figure 3-12: Weak Pull-up Diagram

        75
      • Equation 3-4:

        75
  • 3.11.4 New Registers

    76
    • 3.11.4.1 Both

      76
      • Table 3-32: New Registers for Both Devices

        76
    • 3.11.4.2 Enhanced Mid-range

      76
      • Table 3-33: New Registers for Enhanced mid-range

        76
        • Figure 3-13: Rising/Falling Edges

          76
    • 3.11.4.3 PIC18

      76
      • Table 3-34: New Registers for PIC18

        76
  • 3.11.5 New Instructions

    77
    • 3.11.5.1 Both

      77
      • Table 3-35: New Instructions for Both Devices

        77
  • 3.11.6 Assembly

    77
    • 3.11.6.1 Both

      77
      • Example 3-37:

        77
    • 3.11.6.2 Enhanced mid-range

      77
      • Example 3-38:

        77
      • Example 3-39:

        77
      • Example 3-40:

        78
    • 3.11.6.3 PIC18

      78
      • Example 3-41:

        78
      • Example 3-42:

        78
  • 3.11.7 C Language

    78
• 3.12 Lesson 11: Indirect Addressing

  79
  • 3.12.1 Introduction

    79
    • Figure 3-14: Moving Average with Indirect Addressing

      79
  • 3.12.2 Hardware Effects

    79
  • 3.12.3 Summary

    79
    • 3.12.3.1 Inherent and Literal

      80
    • 3.12.3.2 Direct Addressing

      80
    • 3.12.3.3 Indirect Addressing

      80
  • 3.12.4 New Registers

    81
    • 3.12.4.1 Both

      81
      • Table 3-36: New Registers for Both Devices

        81
        • Figure 3-15: Enhanced Mid-Range Indirect/Direct Addressing

          81
  • 3.12.5 New Instructions

    81
    • 3.12.5.1 Both

      81
      • Table 3-37: New Instructions for Both Devices

        81
  • 3.12.6 Assembly Language

    82
    • 3.12.6.1 Both

      82
      • Example 3-43:

        82
      • Figure 3-16: Before FilterInit Is Called

        82
      • Figure 3-17: After FilterInit is Called

        82
      • Equation 3-5:

        83
  • 3.12.7 C language

    83
    • 3.12.7.1 Both

      83
      • Example 3-44:

        83
      • Example 3-45:

        83
• 3.13 Lesson 12: Look-up Table

  84
  • 3.13.1 Intro

    84
    • Equation 3-6:

      84
  • 3.13.2 Hardware Effects

    84
  • 3.13.3 Summary

    84
  • 3.13.4 New Registers

    84
    • 3.13.4.1 Both

      84
      • Table 3-38: New Registers for Both Devices

        84
        • Figure 3-18: Five situations for the loading of the PC on the Enhanced mid-range core

          85
  • 3.13.5 New Registers

    86
    • 3.13.5.1 Enhanced Mid-range

      86
      • Table 3-39: New Registers for Enhanced Mid-range

        86
    • 3.13.5.2 PIC18

      86
      • Table 3-40: New Registers for PIC18

        86
  • 3.13.6 New Instructions:

    87
    • 3.13.6.1 Both:

      87
      • Table 3-41: New Instructions for Both Devices

        87
    • 3.13.6.2 Enhanced Mid-range

      87
      • Table 3-42: New Instructions for Enhanced Mid-range

        87
    • 3.13.6.3 PIC18:

      87
      • Table 3-43: New Instructions for PIC18

        87
        • Figure 3-19: Table Pointer Used to Read One Byte of Data – Answer is reflected in ‘TABLAT’

          88
  • 3.13.7 Assembly Language

    88
    • 3.13.7.1 Enhanced Mid-range

      88
      • Example 3-46:

        89
      • Example 3-47:

        89
      • Example 3-48:

        89
      • Example 3-49:

        90
    • 3.13.7.2 PIC18

      90
    • 3.13.7.3 Program Counter

      91
      • Example 3-50:

        91
    • 3.13.7.4 Table Read

      91
      • Example 3-51:

        91
      • Example 3-52:

        91
  • 3.13.8 C Language

    91
    • 3.13.8.1 Both

      91
      • Example 3-53:

        92
      • Figure 3-20: Declared as a Constant

        92
      • Figure 3-21: Not Declared as a Constant

        92
      • Example 3-54:

        92
• 3.14 Lesson 13: EEPROM

  93
  • 3.14.1 Introduction

    93
  • 3.14.2 Hardware Effects

    93
  • 3.14.3 Summary

    93
    • Figure 3-22: Program Flow

      93
  • 3.14.4 New Registers

    94
    • 3.14.4.1 Both

      94
      • Table 3-44: New Registers for Both Devices

        94
  • 3.14.5 New Instructions

    94
    • 3.14.5.1 Both

      94
      • Table 3-45: New Instructions for Both Devices

        94
  • 3.14.6 Assembly Language

    94
    • 3.14.6.1 Both

      94
      • Example 3-55:

        95
  • 3.14.7 C Language

    95
    • 3.14.7.1 Both

      95
      • Example 3-56:

        95
      • Figure A-1: Low Pin Count Board Schematic

        97
• A.1 Useful MPLAB® X Shortcuts

  98
• A.2 Finding Register Names

  98
• A.3 PIC MCU Assembly Coding Practices:

  98
  • Example A-1:

    99
• Worldwide Sales

  101