Intel 82543GC 사용자 설명서

 

 

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Problem:  

The 82543GC Register Summary  refers to page numbers in the format (11-182, 11-186, 11-188, …) and (10-
162, 10-166, 10-166, …).  

 

The pagination will change to the format (182, 186, 188, …) and (162, 166, 186, …). The actual page numbers 
are correct. 

OR-2710 82543GC Gigabit Ethernet Controller Developer’s Manual Rev. 2.01. 

 

Problem:  

The output labeled O_EN_CDET should be relabeled to NO_CONNECT. The Enable Comma Detect function is 
not present on the 825543GC Gigabit Ethernet Controller. This change affects the Pin Description Tables and 
Signal Name to Electrical Connection Lists.  

 

Comma detection triggers a SERDES device (present in 1000BASE-SX designs) to re-acquire byte 
synchronization, and is used primarily during Auto-negotiation. Comma detection can be asserted on the 
SERDES by permanently connecting the SERDES input to Vcc through an approximately 1K pullup resistor. 
The SERDES will perform the realignment every time it detects a comma character. 

OR-2711 82543GC Gigabit Ethernet Controller Advance Information Datasheet  Rev. 2.01. 

 

Problem:  

The IEEE standard minimum transmit inter-packet gap is 96 bit times. To achieve that gap requires a 
programmed setting to the IPGT Field in the Transmit Inter packet Gap (TIPG) Register. The actual inter-packet 
gap in MAC data clocks) is the sum of the programmed value and a variable logic synchronization time within 
the device. Use a recommended programming value of 10 for TBI applications and 10 for 10/100/1000BASE-T 
applications to assure that the minimum IPG gap will be met under all synchronization conditions.  

The Developer’s Manual currently indicates a programming value of 6 for both fiber and copper 
implementations. This value will change to 10.  In addition to the register listing, section 12.5 Transmit 
Initialization text should change.   

OR-2710 82543GC Gigabit Ethernet Controller Developer’s Manual Rev. 2.01.

 

 

Problem:  

The Transmit Report Status Sent function is not implemented to write back descriptor status when packet data 
goes out on the wire. The Report Packet Sent (RPS) Bit in the transmit descriptor (Bit 4 in TDESC.CMD) is 
Reserved and should be programmed to 0. The related Report Status function (Bit 3 in TDESC.CMD) may be 
used to force transmit descriptor status bytes to be written back to memory as the packet data reaches the 
transmit queue. 

Affected text includes 4.3.2 Transmit Descriptor Writeback and references in numerous other sections, including 
the interrupt description text.   

OR-2710 82543GC Gigabit Ethernet Controller Developer’s Manual Rev. 2.01. 

 

Problem:  

The controller does not implement the ability to start transmit descriptor data fetches before finishing the 
previous descriptor. In addition, it does not have the ability to disable DMA preemptions during TCP