Intel 253668-032US 사용자 설명서
Vol. 3 17-25
8086 EMULATION
tions in virtual-8086 mode in the same manner as an Intel386 or Intel486 processor
does. When this flag is set, the virtual mode extension provides the following
enhancements to virtual-8086 mode:
does. When this flag is set, the virtual mode extension provides the following
enhancements to virtual-8086 mode:
•
Speeds up the handling of software-generated interrupts in virtual-8086 mode by
allowing the processor to bypass the virtual-8086 monitor and redirect software
interrupts back to the interrupt handlers that are part of the currently running
8086 program.
allowing the processor to bypass the virtual-8086 monitor and redirect software
interrupts back to the interrupt handlers that are part of the currently running
8086 program.
•
Supports virtual interrupts for software written to run on the 8086 processor.
The IOPL value interacts with the VME flag and the bits in the interrupt redirection bit
map to determine how specific software interrupts should be handled.
The software interrupt redirection bit map (see Figure 17-5) is a 32-byte field in the
TSS. This map is located directly below the I/O permission bit map in the TSS. Each
bit in the interrupt redirection bit map is mapped to an interrupt vector. Bit 0 in the
interrupt redirection bit map (which maps to vector zero in the interrupt table) is
located at the I/O base map address in the TSS minus 32 bytes. When a bit in this bit
map is set, it indicates that the associated software interrupt (interrupt generated
with an INT n instruction) should be handled through the protected-mode IDT and
interrupt and exception handlers. When a bit in this bit map is clear, the processor
redirects the associated software interrupt back to the interrupt table in the 8086
program (located at linear address 0 in the program’s address space).
map to determine how specific software interrupts should be handled.
The software interrupt redirection bit map (see Figure 17-5) is a 32-byte field in the
TSS. This map is located directly below the I/O permission bit map in the TSS. Each
bit in the interrupt redirection bit map is mapped to an interrupt vector. Bit 0 in the
interrupt redirection bit map (which maps to vector zero in the interrupt table) is
located at the I/O base map address in the TSS minus 32 bytes. When a bit in this bit
map is set, it indicates that the associated software interrupt (interrupt generated
with an INT n instruction) should be handled through the protected-mode IDT and
interrupt and exception handlers. When a bit in this bit map is clear, the processor
redirects the associated software interrupt back to the interrupt table in the 8086
program (located at linear address 0 in the program’s address space).
NOTE
The software interrupt redirection bit map does not affect hardware
generated interrupts and exceptions. Hardware generated interrupts
and exceptions are always handled by the protected-mode interrupt
and exception handlers.
generated interrupts and exceptions. Hardware generated interrupts
and exceptions are always handled by the protected-mode interrupt
and exception handlers.