Kingston Technology KVR800D3S8S6/2G 데이터 시트
Memory Module Specifications
KVR800D3S8S6/2G
2GB 256M x 64-Bit PC3-6400
CL6 204-Pin SODIMM
CL6 204-Pin SODIMM
Kingston.com
Document No. VALUERAM0931-001.A00 08/13/10 Page 1
DESCRIPTION
This document describes ValueRAM’s 256M x 64-bit (2GB)
DDR3-800MHz CL6 SDRAM (Synchronous DRAM) memory
module, 1Rx8, based on eight 256M x 8-bit DDR3-800MHz
FBGA components. The SPD is programmed to JEDEC
standard latency 800MHz timing of 6-6-6 at 1.5V. This 204-
pin SODIMM uses gold contact fingers and requires +1.5V.
The electrical and mechanical specifications are as follows:
DDR3-800MHz CL6 SDRAM (Synchronous DRAM) memory
module, 1Rx8, based on eight 256M x 8-bit DDR3-800MHz
FBGA components. The SPD is programmed to JEDEC
standard latency 800MHz timing of 6-6-6 at 1.5V. This 204-
pin SODIMM uses gold contact fingers and requires +1.5V.
The electrical and mechanical specifications are as follows:
FEATURES
• JEDEC standard 1.5V ± 0.075V Power Supply
• VDDQ = 1.5V ± 0.075V
• 400MHz fCK for 800Mb/sec/pin
• 8 independent internal bank
• Programmable CAS Latency: 6,7,8,9
• Posted CAS
• Programmable Additive Latency: 0, CL - 2, or CL - 1 clock
• Programmable CAS Write Latency (CWL) = 5 (DDR3-800)
• 8-bit pre-fetch
• Burst Length: 8 (Interleave without any limit, sequential with
• VDDQ = 1.5V ± 0.075V
• 400MHz fCK for 800Mb/sec/pin
• 8 independent internal bank
• Programmable CAS Latency: 6,7,8,9
• Posted CAS
• Programmable Additive Latency: 0, CL - 2, or CL - 1 clock
• Programmable CAS Write Latency (CWL) = 5 (DDR3-800)
• 8-bit pre-fetch
• Burst Length: 8 (Interleave without any limit, sequential with
starting address “000” only), 4 with tCCD = 4 which does
not allow seamless read or write [either on the fly using A12
or MRS]
not allow seamless read or write [either on the fly using A12
or MRS]
• Bi-directional Differential Data Strobe
• Internal (self) calibration : Internal self calibration through ZQ
• Internal (self) calibration : Internal self calibration through ZQ
pin (RZQ : 240 ohm ± 1%)
• On Die Termination using ODT pin
• Average Refresh Period 7.8us at lower than TCASE 85°C,
• Average Refresh Period 7.8us at lower than TCASE 85°C,
3.9us at 85°C < TCASE ≤ 95°C
• Asynchronous Reset
• PCB : Height 1.180” (30.00mm), double sided component
• PCB : Height 1.180” (30.00mm), double sided component
SPECIFICATIONS
CL(IDD)
6 cycles
Row Cycle Time (tRCmin)
52.5ns (min.)
Refresh to Active/Refresh
160ns
Command Time (tRFCmin)
Row Active Time (tRASmin)
37.5ns (min.)
Power
.600 W (operating)
UL Rating
94 V - 0
Operating Temperature
0° C to 85° C
Storage Temperature
-55° C to +100° C
Continued >>