Atmel ARM-Based Evaluation Kit AT91SAM9N12-EK AT91SAM9N12-EK 데이터 시트

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SAM9N12/SAM9CN11/SAM9CN12 [DATASHEET]

11063K–ATARM–05-Nov-13

The LIN Mode provides Master node and Slave node connectivity on a LIN bus.

The LIN (Local Interconnect Network) is a serial communication protocol which efficiently supports the control of
mechatronic nodes in distributed automotive applications.

The main properties of the LIN bus are:



Single Master/Multiple Slaves concept



Low cost silicon implementation based on common UART/SCI interface hardware, an equivalent in software, or as 
a pure state machine.



Self synchronization without quartz or ceramic resonator in the slave nodes



Deterministic signal transmission



Low cost single-wire implementation



Speed up to 20 kbit/s

LIN provides cost efficient bus communication where the bandwidth and versatility of CAN are not required.

The LIN Mode enables processing LIN frames with a minimum of action from the microprocessor.

The USART can act either as a LIN Master node or as a LIN Slave node.

The node configuration is chosen by setting the USART_MODE field in the USART Mode register (US_MR):



LIN Master Node (USART_MODE = 0xA)



LIN Slave Node (USART_MODE = 0xB)

In order to avoid unpredicted behavior, any change of the LIN node configuration must be followed by a software reset of
the transmitter and of the receiver (except the initial node configuration after a hardware reset). (See 

)

The baud rate is configured in the Baud Rate Generator register (US_BRGR).

All the LIN Frames start with a header which is sent by the master node and consists of a Synch Break Field, Synch Field
and Identifier Field.

So in Master node configuration, the frame handling starts with the sending of the header.

The header is transmitted as soon as the identifier is written in the LIN Identifier register (US_LINIR). At this moment the
flag TXRDY falls.

The Break Field, the Synch Field and the Identifier Field are sent automatically one after the other.

The Break Field consists of 13 dominant bits and 1 recessive bit, the Synch Field is the character 0x55 and the Identifier
corresponds to the character written in the LIN Identifier Register (US_LINIR). The Identifier parity bits can be
automatically computed and sent (see 

The flag TXRDY rises when the identifier character is transferred into the Shift Register of the transmitter.