Intel E3815 FH8065301567411 데이터 시트

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FH8065301567411
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Intel
®
 Atom™ Processor E3800 Product Family
Datasheet
2881
21.12.20 ASRC Free Running Timer (ASRC_FRT)—Offset 7Ch
This is a 32 bit free running counter that can be enabled, paused or cleared using bits 
in the SSCR2_XR register. The value reflected here will be noted down in the timer 
snapshot register when the frame count matches the frame threshold
Access Method
Default: 00000000h
21.12.21 Frame Threshold for ASRC Frame Count (ASRC_FTC)—Offset 
80h
The frame threshold value at which the timer snapshot will be taken is written here.
Access Method
Default: 00000000h
0
0b
RO
Reserved (RSVD): 
Reserved.
Bit 
Range
Default & 
Access
Description
Type: 
Memory Mapped I/O Register
(Size: 32 bits)
ASRC_FRT: 
BAR Type: 
PCI Configuration Register (Size: 32 bits)
BAR Reference: 
[B:0, D:21, F:0] + 10h
31
28
24
20
16
12
8
4
0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
FRE
E
_RUN_TIMER
Bit 
Range
Default & 
Access
Description
31:0
00000000h
RO/V
ASRC free running timer (FREE_RUN_TIMER): 
This field reflects the value of the 
free running timer.
Type: 
Memory Mapped I/O Register
(Size: 32 bits)
ASRC_FTC: 
BAR Type: 
PCI Configuration Register (Size: 32 bits)
BAR Reference: 
[B:0, D:21, F:0] + 10h
31
28
24
20
16
12
8
4
0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
RS
VD0
AS
R
C
_F
TC