Intel E3815 FH8065301567411 데이터 시트
제품 코드
FH8065301567411
Intel
®
Atom™ Processor E3800 Product Family
3818
Datasheet
25.5.19
reg_SPI_CS_CTRL_REG (SPI_CS_CTRL)—Offset 418h
Access Method
Default: 00000000h
1
0h
RW
ILB_CKBIT:
This bit field is a legacy (chicken bit) bug fix established in previous Intel
projects. The driver should set this bit to 0b to ensure correct operation.
0
0h
RW
disable_ssp_dma_finish:
disable ssp dma finish
Bit
Range
Default &
Access
Field Name (ID): Description
Type:
Memory Mapped I/O Register
(Size: 32 bits)
Offset:
BAR Type:
PCI Configuration Register (Size: 32 bits)
BAR Reference:
[B:0, D:30, F:5] + 10h
31
28
24
20
16
12
8
4
0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
re
se
rv
ed
sp
i_cs_st
ate
sp
i_cs_mod
e
Bit
Range
Default &
Access
Field Name (ID): Description
31:2
0h
RW
reserved:
reserved
1
0h
RW
spi_cs_state:
SW override of CS line in SW mode for spi.
0
0h
RW
spi_cs_mode:
Selects HW mode or SW mode for chip select for spi.