Intel E3815 FH8065301567411 데이터 시트

제품 코드
FH8065301567411
다운로드
페이지 5308
PCU – System Management Bus (SMBus)
Intel
®
 Atom™ Processor E3800 Product Family
4432
Datasheet
(SMB_Mem_HD0) and Data 1 (SMB_Mem_HD1) registers on the read word. See 
section 5.5.5 of the System Management Bus (SMBus) Specification, Version 2.0 for 
the format of the protocol.
Process Call
The process call is so named because a command sends data and waits for the slave to 
return a value dependent on that data. The protocol is simply a Write Word followed by 
a Read Word, but without a second command or stop condition. 
When programmed for the Process Call command, the SoC transmits the Transmit 
Slave Address (SMB_Mem_TSA), Host Command (SMB_Mem_HCMD), Data 0 
(SMB_Mem_HD0) and Data 1 (SMB_Mem_HD1) registers. Data received from the 
device is stored in the Data 0 (SMB_Mem_HD0) and Data 1 (SMB_Mem_HD1) 
registers. The Process Call command with SMB_Config_HCFG.I2C_EN set and the 
SMB_Config_HCTL.PECEN bit set produces undefined results. Software must force 
either SMB_Config_HCFG.I2C_EN or SMB_Config_HCTL.PECEN & 
SMB_Mem_AUXC.AAC to 0b when running this command. See section 5.5.6 of the 
System Management Bus (SMBus) Specification, Version 2.0 for the format of the 
protocol.
Note:
For process call command, the value written into SMB_Mem_TSA.RW needs to be 0b.
Note:
If the SMB_Config_HCFG.I2C_EN bit is set, the protocol sequence changes slightly: the 
Command Code (Bits 18:11 in the bit sequence) are not sent - as a result, the slave 
will not acknowledge (Bit 19 in the sequence).
Block Read/Write
The SoC contains a 32-byte buffer for read and write data which can be enabled by 
setting SMB_Mem_AUXC.E32B, as opposed to a single byte of buffering. This 32-byte 
buffer is filled with write data before transmission, and filled with read data on 
reception. In the SoC, the interrupt is generated only after a transmission or reception 
of 32 bytes, or when the entire byte count has been transmitted/received.
Note:
When operating in I
2
C mode (SMB_Config_HCFG.I2C_EN bit is set), the SoC will never 
use the 32-byte buffer for any block commands.
The byte count field is transmitted but ignored by the SoC as software will end the 
transfer after all bytes it cares about have been sent or received.
For a Block Write, software must either force the SMB_Config_HCFG.I2C_EN bit or both 
the SMB_Config_HCTL.PECEN and SMB_Mem_AUXC.AAC bits to 0b when running this 
command.
The block write begins with a slave address and a write condition. After the command 
code the SoC issues a byte count describing how many more bytes will follow in the 
message. If a slave had 20 bytes to send, the first byte would be the number 20 (14h), 
followed by 20 bytes of data. The byte count may not be 0. A Block Read or Write is 
allowed to transfer a maximum of 32 data bytes.