Intel E3815 FH8065301567411 데이터 시트
제품 코드
FH8065301567411
PCU – System Management Bus (SMBus)
Intel
®
Atom™ Processor E3800 Product Family
Datasheet
4437
Note:
Using this signal as a wake event from is not supported.
33.2.6
SMBus CRC Generation and Checking
If the SMB_Mem_AUXC.AAC is set, the SoC automatically calculates and drives CRC at
the end of the transmitted packet for write cycles, and will check the CRC for read
cycles. It will not transmit the contents of the Packet Error Check Data Register
(SMB_Mem_PEC) PEC register for CRC. The SMB_Mem_HCTL.PECEN bit must not be
set if this bit is set, or unspecified behavior will result.
the end of the transmitted packet for write cycles, and will check the CRC for read
cycles. It will not transmit the contents of the Packet Error Check Data Register
(SMB_Mem_PEC) PEC register for CRC. The SMB_Mem_HCTL.PECEN bit must not be
set if this bit is set, or unspecified behavior will result.
If the read cycle results in a CRC error, the SMB_Mem_HSTS.DEVERR bit and the
SMB_Mem_AUXS.CRCE bit will be set.
SMB_Mem_AUXS.CRCE bit will be set.
33.2.7
SMBus Slave Interface
The SoC does not implement a complete SMBus slave interface. Only the Host Notify
Command is implemented to maintain specification compatibility.
Command is implemented to maintain specification compatibility.
33.2.7.1
Format of Host Notify Command
The SoC tracks and responds to the standard Host Notify command as specified in the
System Management Bus (SMBus) Specification, Version 2.0. The host address for this
command is fixed to 0001000b. If the SoC already has data for a previously-received
host notify command which has not been serviced yet by the host software (as
indicated by the SMB_Mem_SSTS.HNST bit), then it will NACK following the host
address byte of the protocol. This allows the host to communicate non-acceptance to
the master and retain the host notify address and data values for the previous cycle
until host software completely services the interrupt.
System Management Bus (SMBus) Specification, Version 2.0. The host address for this
command is fixed to 0001000b. If the SoC already has data for a previously-received
host notify command which has not been serviced yet by the host software (as
indicated by the SMB_Mem_SSTS.HNST bit), then it will NACK following the host
address byte of the protocol. This allows the host to communicate non-acceptance to
the master and retain the host notify address and data values for the previous cycle
until host software completely services the interrupt.
Note:
Host software must always clear the SMB_Mem_SSTS.HNST bit after completing any
necessary reads of the address and data registers.
necessary reads of the address and data registers.
Below table shows the Host Notify format.
Table 313. Host Notify Format (Sheet 1 of 2)
Bit
Description
Driven By
Comment
1
Start
External Master
8:2
SMB Host Address – 7 bits External Master
Always 0001_000
9
Write
External Master
Always 0
10
ACK (or NACK)
SoC
SoC NACKs if SMB_Mem_SSTS.HNST is
1
1
17:11 Device Address – 7 bits
External Master
Indicates the address of the master;
loaded into the Notify Device Address
Register (SMB_Mem_NDA)
loaded into the Notify Device Address
Register (SMB_Mem_NDA)
18
Unused – Always 0
External Master
7-bit-only address; this bit is inserted to
complete the byte
complete the byte
19
ACK
SoC